ASYNCHRONOUS DATA SHIFT AND BACKUP BETWEEN ASYMMETRIC DATA SOURCES

• US 20130111104A1
• Filed: 10/31/2011
• Published: 05/02/2013
• Est. Priority Date: 10/31/2011
• Status: Abandoned Application

• Current Assignee: Taejin Info Tech, LLC
• Original Assignee: Taejin Info Tech, LLC
• Inventors: Kim, Moon J.
• Application Number:
  US13/285,159
• Publication Number:
  US 20130111104A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/1456 Hardware arrangements for backup
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30

Abstract

Embodiments of the present invention provide a semiconductor storage device (SSD)-based storage system. Specifically, in a typical embodiment, the system comprises a SSD memory disk unit having (among other components) a memory controller and an asynchronous backup controller for providing asynchronous data shift and/or backup between multiple data storage units (e.g., a memory unit and a flash memory unit). The SSD memory disk unit further comprises a plurality of host interface units that communicate with a plurality of physical interface units of a device driver (e.g., on a one-to-one or one-to-multiple basis). The device driver also comprises a logical interface coupled to the plurality of physical interface units.

Claims

1. A semiconductor storage device (SSD) memory disk unit, comprising:

a host interface controller;

a plurality of host interface units coupled to the host interface controller;

a DMA controller coupled to the host interface unit;

an ECC controller coupled to the DMA controller;

a memory controller coupled to the ECC controller;

an asynchronous backup controller coupled to the memory controller; and

a memory array coupled to the memory controller, the memory array comprising at least one memory block.

2. The SSD memory disk unit of claim 1, further comprising a device driver coupled to the SSD memory disk unit.

3. The SSD memory disk unit of claim 2, the device driver comprising:

a plurality of physical interface units; and

a logical interface coupled to the plurality of physical interface units.

4. The SSD memory disk unit of claim 3, the plurality of host interface units comprising a first host interface unit and a second host interface unit, and the plurality of physical interface units comprising a first physical interface unit and a second physical interface unit.

5. The SSD memory disk unit of claim 4, wherein the first host interface unit communicates with the first physical interface unit, and the second host interface unit communicates with the second physical interface unit.

6. The SSD memory disk unit of claim 1, further comprising:

a power controller; and

an internal battery coupled to the power controller for providing power to the SD memory disk unit.

7. The SSD memory disk unit of claim 1, further comprising:

a flash memory unit comprising a set of flash memory blocks coupled to the asynchronous backup controller, the asynchronous backup controller providing backup for data between the memory array and the flash memory unit.

8. The SSD memory disk unit of claim 1, the memory array being volatile, and the plurality of host interface units being PCI-Express host interface units.

9. A semiconductor storage device (SSD)-based system, comprising:

a SSD memory disk unit comprising;

a host interface controller;

a plurality of host interface units coupled to the host interface controller;

a DMA controller coupled to the host interface unit;

an ECC controller coupled to the DMA controller;

a memory controller coupled to the ECC controller;

a memory array coupled to the memory controller, the memory array comprising at least one memory block;

an asynchronous backup controller coupled to the memory controller;

a flash memory unit coupled to the asynchronous backup controller, the flash memory unit comprising at least one flash memory block;

a device driver comprising;

a plurality of physical interface units; and

a logical interface coupled to the plurality of physical interface units.

10. The SSD-based system of claim 9, the plurality of host interface units comprising a first host interface unit and a second host interface unit, and the plurality of physical interface units comprising a first physical interface unit and a second physical interface unit.

11. The SSD-based system of claim 10, wherein the first host interface unit communicates with the first physical interface unit, and the second host interface unit communicates with the second physical interface unit.

12. The SSD-based system of claim 9, further comprising:

a backup storage unit which stores data of the SSD memory disk unit; and

a backup control unit which backs up data stored in the SSD memory disk unit in the backup storage unit, according to an instruction from a host or when an error occurs in the power transmitted from the host.

13. The SSD-based system of claim 12, further comprising:

a power controller; and

an internal battery coupled to the power controller for providing power to the SD memory disk unit.

14. The SSD-based system unit of claim 9, the memory array being volatile, and the plurality of host interface units being PCI-Express host interface units.

15. A method for forming a semiconductor storage device (SSD) memory disk unit, comprising:

coupling a plurality of host interface units to a host interface controller;

coupling a DMA controller to the host interface unit;

coupling an ECC controller to the DMA controller;

coupling a memory controller to the ECC controller;

coupling an asynchronous backup controller to the memory controller; and

coupling a memory array to the memory controller, the memory array comprising at least one memory block.

16. The method of claim 15, further comprising coupling a device driver to the SSD memory disk unit.

17. The method of claim 16, further comprising forming the device driver by coupling a logical interface to a plurality of physical interface units.

18. The method of claim 17, the plurality of host interface units comprising a first host interface unit and a second host interface unit, and the plurality of physical interface units comprising a first physical interface unit and a second physical interface unit.

19. The method of claim 15, further comprising:

coupling a flash memory unit comprising a set of flash memory blocks to the asynchronous backup controller, the asynchronous backup controller providing backup for data between the memory array and the flash memory unit.

20. The method unit of claim 15, the memory array being volatile, and the plurality of host interface units being PCI-Express host interface units.