SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

• US 20130119377A1
• Filed: 11/05/2012
• Published: 05/16/2013
• Est. Priority Date: 11/10/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: NODA, Kosei, Endo, Yuta
• Granted Patent: US 9,123,692 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78636 with supplementary region or layer for improving the flatness of the device
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

By reducing the contact resistance between an oxide semiconductor film and a metal film, a transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device includes a pair of electrodes over an insulating surface; an oxide semiconductor film in contact with the pair of electrodes; a gate insulating film over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film interposed therebetween. In the semiconductor device, the pair of electrodes contains a halogen element in a region in contact with the oxide semiconductor film. Further, plasma treatment in an atmosphere containing fluorine can be performed so that the pair of electrodes contains the halogen element in a region in contact with the oxide semiconductor film.

Claims

1. A semiconductor device comprising:

a pair of electrodes over an insulating surface;

an oxide semiconductor film over and in contact with the pair of electrodes;

a gate electrode over the insulating surface; and

a gate insulating film adjacent to the gate electrode and the oxide semiconductor film,

wherein the pair of electrodes comprises a region in contact with the oxide semiconductor film, and

wherein halogen is included at least in the region.

2. The semiconductor device according to claim 1,

wherein the gate insulating film is over the oxide semiconductor film, and

wherein the gate electrode is overlapping with the oxide semiconductor film with the gate insulating film therebetween.

3. The semiconductor device according to claim 1,

wherein the gate insulating film is over the gate electrode, and

wherein the pair of electrodes is over the gate insulating film.

4. The semiconductor device according to claim 1,

wherein the region is in contact with upper surfaces of the pair of electrodes.

5. The semiconductor device according to claim 1,

wherein the halogen is fluorine.

6. The semiconductor device according to claim 1,

wherein the region comprises a bond between the halogen and metal included in the pair of electrodes.

7. The semiconductor device according to claim 1,

wherein the oxide semiconductor film comprises a pair of low-resistance regions partly overlapping with the pair of electrodes and a high-resistance region overlapping with the gate electrode with the gate insulating film therebetween,

wherein the pair of low-resistance regions has a lower resistance than the high-resistance region, and

wherein the pair of low-resistance regions have a sheet resistance of 30 kΩ

/sq or less.

8. The semiconductor device according to claim 7,

wherein the pair of low-resistance regions comprises at least any one of elements selected from hydrogen, helium, boron, nitrogen, fluorine, neon, aluminum, phosphorus, argon, arsenic, krypton, indium, tin, antimony, and xenon.

9. The semiconductor device according to claim 1,

wherein the oxide semiconductor film is a c-axis aligned crystalline oxide semiconductor film.

10. The semiconductor device according to claim 1,

wherein the oxide semiconductor film comprises at least any one of materials selected from In, Ga, Zn, and O.

11. A method of manufacturing a semiconductor device comprising the steps of:

forming a pair of electrodes over an insulating surface;

performing a halogenation treatment on the pair of electrodes;

forming an oxide semiconductor film over and in contact with the pair of electrodes after the halogenation treatment;

forming a gate insulating film over the oxide semiconductor film; and

forming a gate electrode overlapping with the oxide semiconductor film with the gate insulating film therebetween.

12. The method of manufacturing a semiconductor device according to claim 11,

wherein the pair of electrodes is formed by etching with use of a mask, and

wherein after removing the mask, the halogenation treatment is performed at least on upper surfaces of the pair of electrodes.

13. The method of manufacturing a semiconductor device according to claim 11,

wherein the halogenation treatment is plasma treatment in an atmosphere containing fluorine.

14. The method of manufacturing a semiconductor device according to claim 11, further comprising the step of:

after forming the gate electrode, adding an impurity to the oxide semiconductor film using the gate electrode as a mask so that the oxide semiconductor film comprises a pair of low-resistance regions partly overlapping with the pair of electrodes, and

wherein the pair of low-resistance regions have a sheet resistance of 30 kΩ

/sq or less.

15. The method of manufacturing a semiconductor device according to claim 14,

wherein the pair of low-resistance regions comprises at least any one of elements selected from hydrogen, helium, boron, nitrogen, fluorine, neon, aluminum, phosphorus, argon, arsenic, krypton, indium, tin, antimony, and xenon.

16. The method of manufacturing a semiconductor device according to claim 11, further comprising the steps of:

after forming the pair of electrodes, forming an insulating film to cover the pair of electrodes; and

performing a chemical mechanical polishing treatment on the insulating film until the pair of electrodes is exposed.

17. A method of manufacturing a semiconductor device comprising the steps of:

forming a gate electrode over an insulating surface;

forming a gate insulating film over the gate electrode;

forming a pair of electrodes over the gate insulating film;

performing a halogenation treatment on the pair of electrodes; and

forming an oxide semiconductor film over and in contact with the pair of electrodes after the halogenation treatment.

18. The method of manufacturing a semiconductor device according to claim 17,

wherein the pair of electrodes is formed by an etching method with use of a mask, and

wherein after removing the mask, the halogenation treatment is performed at least on upper surfaces of the pair of electrodes.

19. The method of manufacturing a semiconductor device according to claim 17,

wherein the halogenation treatment is plasma treatment in an atmosphere containing fluorine.