SIGNAL LINE DRIVER CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE

• US 20130120229A1
• Filed: 11/02/2012
• Published: 05/16/2013
• Est. Priority Date: 11/11/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Miyake, Hiroyuki, Inoue, Seiko
• Granted Patent: US 9,053,675 B2
• Time in Patent Office: Days
• US Class Current: 345/87
• CPC Class Codes: G09G 2300/0434 Flat panel display in which a field is applied parallel to the display plane
• CPC Class Codes: G09G 2300/0469 Details of the physics of pixel operation
• CPC Class Codes: G09G 2320/046 Dealing with screen burn-in prevention or compensation of the effects thereof
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3685 Details of drivers for data electrodes

Abstract

To prevent malfunctions from occurring. A shift register, a selection circuit having a function of determining which a first pulse signal or a second pulse signal is output at the same potential level as a pulse signal input from the shift register, and a plurality of driving signal output circuits each having functions of generating and outputting a driving signal are provided. Each of the plurality of driving signal output circuits includes a latch unit, a buffer unit, and a switch unit for controlling rewriting of data stored in the latch unit.

Claims

1. A driver circuit comprising:

a shift register;

a selection circuit having a function of determining which a first pulse signal or a second pulse signal is output at the same potential level as a pulse signal input from the shift register, in accordance with a first clock signal and a second clock signal; and

a driving signal output circuit having functions of generating and outputting a driving signal for controlling a potential of a signal line in accordance with the first and second pulse signals input from the selection circuit and first and second control signals,

wherein the driving signal output circuit comprises;

a latch unit configured to rewrite and store first data and second data in accordance with the first and second pulse signals;

a buffer unit configured to set a potential of the driving signal in accordance with the first data and the second data and output the driving signal; and

a switch unit configured to control rewriting of the first data by being turned on or off in accordance with the first control signal and the second control signal.

2. The driver circuit according to claim 1, wherein the driving signal output circuit comprises a field-effect transistor, the field-effect transistor uses an oxide semiconductor layer as a channel formation layer.

3. A liquid crystal display device comprising the driver circuit according to claim 1, further comprising:

a data signal line;

a gate signal line;

a common signal line whose potential is controlled by the driving signal output from the driver circuit; and

a pixel comprising a pixel circuit and a liquid crystal element,

wherein the pixel circuit comprises a field-effect transistor one of whose source and drain is electrically connected to the data signal line and whose gate is electrically connected to the gate signal line, and

wherein the liquid crystal element comprises a pair of electrodes, one of the pair of electrodes is electrically connected to the other of the source and the drain of the field-effect transistor and the other of the pair of electrodes is electrically connected to the common signal line.

4. The liquid crystal display device according to claim 3, wherein the field-effect transistor uses an oxide semiconductor layer as a channel formation layer.

5. The liquid crystal display device according to claim 3, further comprising a coloring layer functioning as a color filter.

6. The liquid crystal display device according to claim 3, wherein a liquid crystal material in the liquid crystal element exhibits a blue phase.

7. A driver circuit comprising:

a shift register;

a selection circuit having a function of determining which a first pulse signal or a second pulse signal is output at the same potential level as a pulse signal input from the shift register, in accordance with a first clock signal and a second clock signal; and

a driving signal output circuit having functions of generating and outputting a driving signal for controlling a potential of a signal line in accordance with the first and second pulse signals input from the selection circuit and first to fifth control signals,

wherein the driving signal output circuit comprises;

a first latch unit configured to rewrite and store first data and second data in accordance with the first and second pulse signals;

a second latch unit configured to rewrite and store third data and fourth data in accordance with the first and second pulse signals;

a first buffer unit configured to set a potential of the first signal in accordance with the first data and the second data and output the first signal;

a second buffer unit configured to set a potential of the second signal in accordance with the third data and the fourth data and output the second signal;

a first switch unit configured to control rewriting of the first data by being turned on or off in accordance with the first control signal and the second control signal;

a second switch unit configured to control rewriting of the third data by being turned on or off in accordance with the first control signal and the third control signal;

a third switch unit to which the second signal is input as the fourth control signal and that is configured to control rewriting of the second data stored in the first latch unit by being turned on or off in accordance with the fourth control signal;

a fourth switch unit to which the first signal is input as the fifth control signal and that is configured to control rewriting of the fourth data stored in the second latch unit by being turned on or off in accordance with the fifth control signal; and

a third buffer unit configured to set a potential of the driving signal in accordance with the first signal and the second signal and output the driving signal.

8. The driver circuit according to claim 7, wherein the driving signal output circuit comprises a field-effect transistor, the field-effect transistor uses an oxide semiconductor layer as a channel formation layer.

9. A liquid crystal display device comprising the driver circuit according to claim 7, further comprising:

a data signal line;

a gate signal line;

a common signal line whose potential is controlled by the driving signal output from the driver circuit; and

a pixel comprising a pixel circuit and a liquid crystal element,

wherein the pixel circuit comprises a field-effect transistor one of whose source and drain is electrically connected to the data signal line and whose gate is electrically connected to the gate signal line, and

wherein the liquid crystal element comprises a pair of electrodes, one of the pair of electrodes is electrically connected to the other of the source and the drain of the field-effect transistor and the other of the pair of electrodes is electrically connected to the common signal line.

10. The liquid crystal display device according to claim 9, wherein the field-effect transistor uses an oxide semiconductor layer as a channel formation layer.

11. The liquid crystal display device according to claim 9, further comprising a coloring layer functioning as a color filter.

12. The liquid crystal display device according to claim 9, wherein a liquid crystal material in the liquid crystal element exhibits a blue phase.