CMOS IMAGE SENSOR WITH SHARED MULTIPLEXER AND METHOD OF OPERATING THE SAME
First Claim
1. A CMOS image sensor comprising:
- a pixel array unit for sensing an object, the pixel array unit comprising M pixels and P multiplexers, each of the M pixels being electrically connected to one of the P multiplexers wherein M is a positive integer and P is a positive integer smaller than M;
a row selection unit, electrically connected to the P multiplexers, for generating a row selection signal; and
a logic circuit, electrically connected to the P multiplexers, for determining a sensing region corresponding to the object wherein the sensing region comprises N of the M pixels and N is a positive integer smaller than or equal to M, the logic circuit controlling Q multiplexers, which are electrically connected to the N pixels, to transmit the row selection signal to the N pixels wherein Q is a positive integer smaller than or equal to N and smaller than or equal to P.
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Abstract
A CMOS image sensor includes a pixel array unit, a row selection unit, and a logic circuit. The pixel array unit is used for sensing an object. The pixel array unit includes M pixels and P multiplexers and each of the M pixels is electrically connected to one of the P multiplexers, wherein M is a positive integer and P is a positive integer smaller than M. The row selection unit and the logic circuit are electrically connected to the P multiplexers. The row selection unit is used for generating a row selection signal. The logic circuit is used for determining a sensing region corresponding to the object wherein the sensing region includes N of the M pixels. Furthermore, the logic circuit controls Q multiplexers, which are electrically connected to the N pixels, to transmit the row selection signal to the N pixels.
10 Citations
13 Claims
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1. A CMOS image sensor comprising:
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a pixel array unit for sensing an object, the pixel array unit comprising M pixels and P multiplexers, each of the M pixels being electrically connected to one of the P multiplexers wherein M is a positive integer and P is a positive integer smaller than M; a row selection unit, electrically connected to the P multiplexers, for generating a row selection signal; and a logic circuit, electrically connected to the P multiplexers, for determining a sensing region corresponding to the object wherein the sensing region comprises N of the M pixels and N is a positive integer smaller than or equal to M, the logic circuit controlling Q multiplexers, which are electrically connected to the N pixels, to transmit the row selection signal to the N pixels wherein Q is a positive integer smaller than or equal to N and smaller than or equal to P. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of operating a CMOS image sensor comprising steps of:
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sensing an object by a pixel array unit, the pixel array unit comprising M pixels and P multiplexers, each of the M pixels being electrically connected to one of the P multiplexers wherein M is a positive integer and P is a positive integer smaller than M; determining a sensing region corresponding to the object wherein the sensing region comprises N of the M pixels and N is a positive integer smaller than or equal to M; generating a row selection signal; and controlling Q multiplexers, which are electrically connected to the N pixels, to transmit the row selection signal to the N pixels wherein Q is a positive integer smaller than or equal to N and smaller than or equal to P. - View Dependent Claims (9, 10, 11, 12, 13)
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Specification