SILICON CARBIDE EPITAXIAL WAFER AND MANUFACTURING METHOD THEREFOR, SILICON CARBIDE BULK SUBSTRATE FOR EPITAXIAL GROWTH AND MANUFACTURING METHOD THEREFOR AND HEAT TREATMENT APPARATUS

• US 20130126906A1
• Filed: 03/18/2011
• Published: 05/23/2013
• Est. Priority Date: 05/10/2010
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: Tomita, Nobuyuki, Hamano, Kenichi, Tarutani, Masayoshi, Kuroiwa, Takeharu, Imaizumi, Masayuki, Sumitani, Hiroaki, Ohtsuka, Kenichi, Furusho, Tomoaki, Sawada, Takao, Abe, Yuji, Mitani, Yoichiro
• Granted Patent: US 8,679,952 B2
• Time in Patent Office: Days
• US Class Current: 257/77
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 25/186 being specially pre-treated by, e.g. chemical or physical means
• CPC Class Codes: C30B 29/36 Carbides
• CPC Class Codes: H01L 21/02378 Silicon carbide
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02529 Silicon carbide
• CPC Class Codes: H01L 21/02587 Structure
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02661 In-situ cleaning
• CPC Class Codes: H01L 21/6719 characterized by the construction of the processing chambers, e.g. modular processing chambers
• CPC Class Codes: H01L 21/68771 characterised by supporting more than one semiconductor substrate
• CPC Class Codes: H01L 29/1608 Silicon carbide

Abstract

A method is provided in order to manufacture a silicon carbide epitaxial wafer whose surface flatness is very good and has a very low density of carrot defects and triangular defects arising after epitaxial growth. The silicon carbide epitaxial wafer is manufactured by a first step of annealing a silicon carbide bulk substrate that is tilted less than 5 degrees from <0001> face, in a reducing gas atmosphere at a first temperature T1 for a treatment time t, a second step of reducing the temperature of the substrate in the reducing gas atmosphere, and a third step of performing epitaxial growth at a second temperature T2 below the annealing temperature T1 in the first step, while supplying at least a gas including silicon atoms and a gas including carbon atoms.

Claims

1. A method of manufacturing a silicon carbide epitaxial wafer, the method comprising:

I) annealing a silicon carbide bulk substrate that is tilted less than 5 degrees from <

0001>

face, in an atmosphere comprising a reducing gas at a first temperature T1 for a treatment time t;

II) reducing the temperature of the substrate in the reducing gas atmosphere; and

then

III) performing epitaxial growth at a second temperature T2 below the annealing temperature T1 in I), while supplying a gas mixture comprising a first gas comprising a silicon atom and a second gas comprising a carbon atom.

2. The method of claim 1, wherein the first temperature T1 is higher than the second temperature T2 by 75 degrees C. or more.

3. The method of claim 1, wherein the epitaxial growth is performed by a CVD method.

4. The method of claim 1, wherein the first gas is a monosilane gas, and the second gas is propane.

5. The method of claim 1, wherein the reducing gas is composed of hydrogen.

6. The method of claim 1, wherein the silicon carbide bulk substrate is composed of 4H—

SiC.

7. The method of claim 1, wherein the treatment time t in I) ranges from 10 seconds to 180 seconds.

8. The method of claim 1 wherein providing that the lowest temperature at which annealing effect occurs in I) is defined as an offset temperature To, and a value of (T1−

To)×

t ranges from 0 to 21000.

9. The method of claim 8, wherein the value of (T1−

To)×

t ranges from 500 to 13500.

10. The method of claim 1, wherein an epitaxial growth layer formed in III) has an n-type residual impurity density of 2×

10¹⁶ cm<sup>−

3</sup> or less.

11. The method of claim 1, wherein providing that a ratio between the numbers of carbons atoms and silicon atoms included in the entire gas mixture supplied in III) is defined as a C/Si ratio, the C/Si ratio is not less than 0.45 and is less than 1.4.

12. The method of claim 11, wherein the C/Si ratio is not less than 1.17 and is less than 1.4.

13. The method of claim 10, wherein the second temperature T2 is not less than 1325 degrees C. and is less than 1500 degrees.

14. A silicon carbide epitaxial wafer produced by method of claim 1.

15. A method of manufacturing a silicon carbide bulk substrate for epitaxial growth, the method comprising:

I) annealing a silicon carbide bulk substrate that is tilted less than 5 degrees from <

0001>

face, in an atmosphere containing comprising a reducing gas at a first temperature T1 for a treatment time t;

II) reducing, in the reducing gas atmosphere, the temperature of the silicon carbide bulk substrate to a third temperature T3 lower than the first temperature T1;

III) stopping supplying the reducing gas; and

then

IV) reducing the temperature of the silicon carbide bulk substrate to a temperature lower than the third temperature T3.

16. The method of claim 15, wherein the first temperature T1 is 1550 degrees C. or more.

17. The method of claim 15, wherein the third temperature T3 is 900 degrees C. or less.

18. The method of claim 15, wherein the reducing gas is composed of hydrogen.

19. The method of claim 15, wherein the silicon carbide bulk substrate is composed of 4H—

SiC.

20. The method of claim 15, wherein the treatment time t ranges from 10 seconds to 180 seconds.

21. The method of claim 15, wherein providing that the lowest temperature at which annealing effect occurs I) is defined as an offset temperature To, and a value of (T1−

To)×

t ranges from 0 to 21000.

22. The method of claim 21, wherein the value of (T1−

To)×

t ranges from 500 to 13500.

23. The method of claim 15, wherein in IV), the silicon carbide bulk substrate is kept at an atmospheric pressure at 30 degrees C. or less for 60 minutes or more.

24. A silicon carbide bulk substrate obtained by the method of claim 15.

25-33. -33. (canceled)