FREQUENCY SCALING OF VARIABLE SPEED SYSTEMS FOR FAST RESPONSE AND POWER REDUCTION
First Claim
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1. A system comprising:
- a plurality of amplifiers configured togenerate a clock signal having a frequency,wherein the clock signal is input to a processor,wherein the amplifiers are connected in series,wherein an output of a last one of the amplifiers is fed back to an input of a first one of the amplifiers, andwherein each of the amplifiers has a transconductance; and
a frequency adjustment module configured to adjust, based on an activity level of the processor, the frequency of the clock signal by adjusting the transconductance of the amplifiers.
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Abstract
A system including a plurality of amplifiers configured to generate a clock signal having a frequency. The clock signal is input to a processor. The amplifiers are connected in series. An output of a last one of the amplifiers is fed back to an input of a first one of the amplifiers. Each of the amplifiers has a transconductance. A frequency adjustment module is configured to adjust, based on an activity level of the processor, the frequency of the clock signal by adjusting the transconductance of the amplifiers.
12 Citations
21 Claims
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1. A system comprising:
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a plurality of amplifiers configured to generate a clock signal having a frequency, wherein the clock signal is input to a processor, wherein the amplifiers are connected in series, wherein an output of a last one of the amplifiers is fed back to an input of a first one of the amplifiers, and wherein each of the amplifiers has a transconductance; and a frequency adjustment module configured to adjust, based on an activity level of the processor, the frequency of the clock signal by adjusting the transconductance of the amplifiers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A system comprising:
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a ring oscillator including a plurality of inverters configured to generate a clock signal having a frequency, wherein the clock signal is supplied to a processor, and wherein each of the inverters has a transconductance; and a frequency adjustment module configured to receive an activity level of the processor, and adjust, based on the activity level of the processor, the frequency of the clock signal by adjusting the transconductance of the inverters. - View Dependent Claims (13, 14, 15, 16)
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17. A method comprising:
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generating a clock signal for a processor using a plurality of inverters connected in series, wherein the clock signal has a frequency, and wherein each of the inverters has a transconductance; receiving an activity level of the processor; and adjusting, based on the activity level of the processor, the frequency of the clock signal by adjusting the transconductance of the inverters. - View Dependent Claims (18, 19, 20, 21)
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Specification