ELECTRO-STATIC DISCHARGE PROTECTION DEVICE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING ELECTRO-STATIC DISCHARGE PROTECTION DEVICE

• US 20130130483A1
• Filed: 12/14/2012
• Published: 05/23/2013
• Est. Priority Date: 02/20/2007
• Status: Active Grant

• Current Assignee: Socionext Inc.
• Original Assignee: Fujitsu Semiconductor Limited (Fujitsu Limited)
• Inventors: SUZUKI, Teruo
• Granted Patent: US 8,722,522 B2
• Time in Patent Office: Days
• US Class Current: 438/514
• CPC Class Codes: H01L 21/04 the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
• CPC Class Codes: H01L 21/823425 manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H01L 29/1087 characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

An electro-static discharge protection device including a gate electrode formed on a substrate. First and second diffusion regions of a first conductivity type are formed in the substrate with the gate electrode located in between. A first silicide layer is formed in the first diffusion region. A silicide block region is formed between the gate electrode and the first silicide layer. A third diffusion region is formed below the first silicide layer to partially overlap the first diffusion region. The third diffusion region and first silicide layer have substantially the same shapes and dimensions. The third diffusion region and a portion below the gate electrode located at the same depth as the third diffusion region contain impurities of a second conductivity type. The third diffusion region has an impurity concentration that is higher than that of the portion below the gate electrode.

Claims

1. A method for manufacturing an electro-static discharge protection device, the method comprising:

forming a gate electrode on a substrate;

forming a first diffusion region and a second diffusion region in the substrate by injecting impure ions of a first conductivity type using the gate electrode as a mask, the gate electrode being located between the first diffusion region and the second diffusion region;

forming a resist pattern to expose at a first local region in a surface of the first diffusion region, the first local region being spaced apart from a first sidewall insulation film formed on a side surface of the gate electrode;

forming a third diffusion region under the first diffusion region in the substrate by injecting impure ions of a second conductivity type that differ from the first conductivity type using the resist pattern as a mask;

forming an insulation film so as to expose a second local region in the surface of the first diffusion region, the second local region being located above the third region and including at least a part of the first local region; and

forming a silicide layer in the exposed second local region of the first diffusion region using the insulation film as a mask.

2. The method for manufacturing an electro-static discharge protection device according to claim 1, further comprising:

forming another diffusion region of the first conductivity type below the third diffusion region by injecting impure ions of the first conductivity type using the insulation film as a mask before forming the silicide layer.

3. The method for manufacturing an electro-static discharge protection device according to claim 1, wherein:

the gate electrode includes a first gate electrode, a second gate electrode spaced apart from the first gate electrode, and a node region formed in the substrate between the first gate electrode and the second gate electrode.

4. A method for manufacturing an electro-static discharge protection device;

the method comprising;

forming a gate electrode on a substrate;

forming a first diffusion region and a second diffusion region in the substrate by injecting impure ions of a first conductivity type using the gate electrode as a mask, the gate electrode being located between the first diffusion region and the second diffusion region;

forming a sidewall insulation film on a side surface of the gate electrode;

forming a fourth diffusion region and a fifth diffusion region respectively below the first diffusion region and the second diffusion region in the substrate by injecting impure ions of the first conductivity type using the gate electrode and the sidewall insulation film as a mask;

forming a resist pattern to expose a first local region in a surface of the first diffusion region, the first local region being spaced apart from the first sidewall insulation film formed on the side surface of the gate electrode;

forming a third diffusion region under the fourth diffusion region in the substrate by injecting impure ions of a second conductivity type that differs from the first conductivity type using the resist pattern as a mask;

forming an insulation film for exposing a second local region in the surface of the first diffusion region, the second local region being located above the third diffusion region and including at least a part of the first local region; and

forming a silicide layer in the exposed second local region of the first diffusion region using the insulation film as a mask.

5. The method for manufacturing the electro-static discharge protection device according to claim 4, wherein:

the gate electrode includes a first gate electrode, a second gate electrode spaced apart from the first gate electrode, and a node region formed in the substrate between the first gate electrode and the second gate electrode.

6. A method for manufacturing an electro-static discharge protection device, the method comprising:

forming a gate electrode on a substrate;

forming a first diffusion region and a second diffusion region in the substrate by injecting impure ions of a first conductivity type using the gate electrode as a mask, the gate electrode being located between the first diffusion region and the second diffusion region;

forming a first sidewall insulation film on a side surface of the gate electrode;

forming a resist pattern for exposing a local region in a surface of the first diffusion region, the local region being spaced apart from the first sidewall insulation film;

forming a third diffusion region at a location deeper than the first diffusion region by injecting impure ions of a second conductivity type that differs from the first conductivity type using the resist pattern as a mask;

forming a sixth diffusion region at a location shallower than the third diffusion region by injecting impure ions of the first conductivity type using the resist pattern as a mask;

forming an insulation film for exposing the sixth diffusion region; and

forming a silicide layer in an exposed surface of the sixth diffusion region using the insulation film as a mask.

7. The method for manufacturing the electro-static discharge protection circuit according to claim 6, wherein:

the gate electrode includes a first gate electrode, a second gate electrode spaced apart from the first gate electrode, and a node region formed in the substrate between the first gate electrode and the second gate electrode.