Processor with Kernel Mode Access to User Space Virtual Addresses

• US 20130132702A1
• Filed: 11/21/2012
• Published: 05/23/2013
• Est. Priority Date: 11/22/2011
• Status: Active Grant

• Current Assignee: MIPS Tech, LLC
• Original Assignee: MIPS Technologies Incorporated (Wave Computing, Inc.)
• Inventors: Patel, Sanjay, Sudhakar, Ranganathan, Dearman, Chris
• Granted Patent: US 9,235,510 B2
• Time in Patent Office: Days
• US Class Current: 711/202
• CPC Class Codes: G06F 12/08 in hierarchically structured memory systems, e.g. virtual memory systems
• CPC Class Codes: G06F 12/1045 associated with a data cache
• CPC Class Codes: G06F 12/109 for multiple virtual address spaces, e.g. segmentation G06F12/1036 takes precedence
• CPC Class Codes: G06F 12/14 Protection against unauthorised use of memory or access to memory
• CPC Class Codes: G06F 12/1491 in a hierarchical protection system, e.g. privilege levels, memory rings

Abstract

A computer includes a memory and a processor connected to the memory. The processor includes memory segment configuration registers to store defined memory address segments and defined memory address segment attributes such that the processor operates in accordance with the defined memory address segments and defined memory address segment attributes to allow kernel mode access to user space virtual addresses for enhanced kernel mode memory capacity.

Claims

1. A method, comprising:

storing defined memory address segments and defined memory address segment attributes in registers of a processor; and

operating the processor in accordance with the defined memory address segments and defined memory address segment attributes to allow kernel mode access to user space virtual addresses for enhanced kernel mode memory capacity.

2. The method of claim 1 further comprising executing virtual address load instructions from user virtual memory while operating in kernel mode.

3. The method of claim 2 wherein the virtual address load instructions are selected from load byte kernel, load byte unsigned kernel, load halfword kernel, load halfword unsigned kernel and load word kernel.

4. The method of claim 1 further comprising executing virtual address store instructions to virtual memory while operating in kernel mode.

5. The method of claim 4 wherein the virtual address store instructions are selected from store byte kernel, store halfword kernel and store word kernel.

6. The method of claim 1 wherein storing includes storing an access permission defined memory address segment attribute.

7. The method of claim 6 wherein storing includes storing an access permission selected from user mode, kernel mode and supervisor mode.

8. The method of claim 1 wherein storing includes storing a cache feature defined memory address segment attribute, wherein the cache feature defines access to addresses within a defined memory address segment.

9. The method of claim 1 wherein storing includes storing a memory map feature defined memory address segment attribute, wherein the memory map feature specifies use of a translation look-aside buffer for an address within a defined memory address segment.

10. A computer, comprising:

a memory; and

a processor connected to the memory, wherein the processor includes memory segment configuration registers to store defined memory address segments and defined memory address segment attributes such that the processor operates in accordance with the defined memory address segments and defined memory address segment attributes to allow kernel mode access to user space virtual addresses for enhanced kernel mode memory capacity.

11. The computer of claim 10 wherein the processor executes virtual address load instructions from user virtual memory while operating in kernel mode.

12. The computer of claim 10 wherein the processor executes virtual address store instructions to virtual memory while operating in kernel mode.

13. The computer of claim 10 wherein the defined memory address segment attributes are selected from an access permission attribute, a cache attribute and a memory map attribute.

14. The computer of claim 10 wherein the memory stores a hypervisor.

15. The computer of claim 10 wherein the memory stores privileged software that writes to the memory segment configuration registers at boot time.

16. The computer of claim 15 wherein the privileged software alternately configures the memory segment configuration registers to fixed memory address segments and configurable memory address segments.

17. A processor, comprising:

memory segment configuration registers to store defined memory address segments and defined memory address segment attributes such that the processor operates in accordance with the defined memory address segments and defined memory address segment attributes to allow kernel mode access to user space virtual addresses for enhanced kernel mode memory capacity.

18. The processor of claim 17 wherein the processor executes virtual address load instructions from user virtual memory while operating in kernel mode.

19. The processor of claim 17 wherein the processor executes virtual address store instructions to virtual memory while operating in kernel mode.

20. The processor of claim 17 wherein the defined memory address segment attributes are selected from an access permission attribute, a cache attribute and a memory map attribute.

21. A computer readable storage medium including executable instructions to define a processor, comprising:

memory segment configuration registers to store defined memory address segments and defined memory address segment attributes such that the processor operates in accordance with the defined memory address segments and defined memory address segment attributes to allow kernel mode access to user space virtual addresses for enhanced kernel mode memory capacity.

22. The computer readable storage medium of claim 21 wherein the processor executes virtual address load instructions from user virtual memory while operating in kernel mode.

23. The computer readable storage medium of claim 21 wherein the processor executes virtual address store instructions to virtual memory while operating in kernel mode.

24. The computer readable storage medium of claim 21 wherein the defined memory address segment attributes are selected from an access permission attribute, a cache attribute and a memory map attribute.