METHOD AND APPARATUS FOR RECONDITIONING A CARRIER WAFER FOR REUSE

• US 20130137244A1
• Filed: 05/29/2012
• Published: 05/30/2013
• Est. Priority Date: 05/26/2011
• Status: Abandoned Application

• Current Assignee: Ob Realty, LLC
• Original Assignee: Solexel, Inc.
• Inventors: Kramer, Karl-Josef, Moslehi, Mehrdad M.
• Application Number:
  US13/482,963
• Publication Number:
  US 20130137244A1
• Time in Patent Office: Days
• US Class Current: 438/478
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02428 Structure
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/0245 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02513 Microstructure
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0259 Microstructure
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 31/02363 of the semiconductor body itself, e.g. textured active layers
• CPC Class Codes: H01L 31/035281 Shape of the body
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: H01L 31/1892 methods involving the use of temporary, removable substrates
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy

Abstract

The disclosed subject matter pertains to deposition of thin film or thin foil materials in general, but more specifically to deposition of epitaxial monocrystalline or quasi-monocrystalline silicon film (epi film) for use in manufacturing of high efficiency solar cells. In operation, methods are disclosed which extend the reusable life and to reduce the amortized cost of a reusable substrate or template used in the manufacturing process of silicon and other semiconductor solar cells.

Claims

1. A method for making a thin film crystalline semiconductor substrate, said method comprising:

providing a reusable doped crystalline semiconductor template;

forming a porous semiconductor sacrificial seed and release layer on a front side of said reusable crystalline semiconductor template;

epitaxially depositing a thin film semiconductor substrate conformally to said sacrificial seed and release layer;

releasing said thin film semiconductor substrate from said reusable semiconductor template by separation at said porous semiconductor seed and layer; and

grinding the bevel of said reusable semiconductor substrate to remove residue of said released epitaxially deposited thin film semiconductor substrate.

2. The method of claim 1 wherein said grinding step is performed after each reuse of said reusable doped crystalline semiconductor template.

3. The method of claim 1 wherein said grinding step is performed once after a plurality of reuse cycles of said reusable doped crystalline semiconductor template.

4. The method of claim 1 wherein said reusable doped crystalline semiconductor template has an area in the range of at least 100 mm×

100 mm up to about 300 mm×

300 mm.

5. The method of claim 1 wherein said reusable doped crystalline semiconductor template and said epitaxially deposited thin film semiconductor substrate comprise the same semiconductor material.

6. The method of claim 1 wherein said reusable doped crystalline semiconductor template and said epitaxially deposited thin film semiconductor substrate comprise different semiconductor materials.

7. The method of claim 1, wherein at least one additional device processing steps are performed after said epitaxially depositing a thin film semiconductor substrate step and prior to said releasing process step.

8. The method of claim 1, wherein at least one additional device processing step is performed after said epitaxially depositing a thin film semiconductor substrate step and prior to said releasing process step.

9. The method of claim 1, wherein said epitaxially depositing a thickening layer of semiconductor material is performed once after a plurality of said epitaxially depositing a thin film semiconductor substrate and subsequently releasing said thin film semiconductor substrate process cycles.

10. The method of claim 1, wherein said thin film crystalline semiconductor substrate is used for fabrication of a solar cell.

11. The method of claim 1, wherein laser processing is utilized prior to said step of releasing said thin film semiconductor substrate from said reusable semiconductor template to cut through the semiconductor substrate and form the peripheral shape for said semiconductor substrate.

12. The method of claim 1, wherein said crystalline semiconductor comprises crystalline silicon.

13. The method of claim 12, wherein said crystalline silicon comprises monocrystalline silicon.

14. The method of claim 1, wherein said crystalline semiconductor comprises crystalline gallium arsenide.

15. The method of claim 1, wherein reusable doped crystalline semiconductor template has a tailored edge bevel.

16. The method of claim 1, wherein reusable doped crystalline semiconductor template has an asymmetric bevel.

17. The method of claim 1, where bevel grinding is performed on a plurality of reusable templates using parallel bevel grinding processing.

18. The method of claim 1, where in addition to bevel grinding, abrasive surface treatment such as grinding, lapping, polishing or chemical etching, including local chemical etching, is applied to a reusable template.

19. The method of claim 1, wherein said epitaxially deposited thin film semiconductor substrate is tailored to contain a variable dopant concentration throughout by using gas-switching and dopant to deposition gas mixture adjustment, said dopant concentration utilized to form beneficial layers such as front surface fields, back surface fields, or regions with suitable low base resistance.

20. The method of claim 1, wherein said reusable templates are marked with identifiers used to track template reuse cycles and processing information.

21. The method of claim 1, wherein said epitaxially deposited and later released substrate is defined using laser processing.

22. The method of claim 21, wherein said laser processing further comprises a laser ablation cutting process which at least partially cuts into the layer to be released in order to weaken the bond to the outside area of the deposited layer.

23. The method of claim 22, wherein said partial cut is subsequently extended to the porous semiconductor designated separation layer by mechanical means such as diamond scribing, water jet pressure or combinations thereof.

24. The method of claim 21, wherein said laser treatment is systematically adjusted during the laser process itself to accommodate thickness non-uniformities of the deposited layer.

25. The method of claim 21, wherein said laser treatment consists of a thermal laser separation step comprising applying local laser induced heating just outside the edge of the deposited substrate layer-to-be-released and followed by local cooling to generate a cleave front to separate the inside deposited layer area to be released from the outside deposited layer area to remain on the template during the main release process.

26. The method of claim 25, wherein said cleaving front is stopped in said porous semiconductor release layer.

27. The method of claim 1, further comprising the step of doping said epitaxially depositing thin film semiconductor substrate prior to release by applying a dopant source and subsequently applying a low effective thermal budget annealing process to form an ex-situ front surface field.

28. The method of claim 27, wherein said dopant source is applied by a deposited film.

29. The method of claim 27, wherein said dopant is applied by ion-implantation.

30. The method of claim 27, wherein said annealing process comprises laser processing.

31. The method of claim 27, wherein said annealing process comprises microwave annealing.