STABLE AMORPHOUS METAL OXIDE SEMICONDUCTOR

• US 20130143395A1
• Filed: 02/04/2013
• Published: 06/06/2013
• Est. Priority Date: 09/08/2008
• Status: Active Grant

• Current Assignee: Fantasy Shine Limited
• Original Assignee: CBRITE Inc.
• Inventors: Shieh, Chan-Long, Yu, Gang
• Granted Patent: US 8,907,336 B2
• Time in Patent Office: Days
• US Class Current: 438/482
• CPC Class Codes: H01L 21/00 Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/16 the devices having semiconductor bodies comprising cuprous oxide or cuprous iodide
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H10K 50/11 characterised by the electroluminescent [EL] layers

Abstract

A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.

Claims

1-21. -21. (canceled)

22. A method of forming a layer of stable amorphous metal oxide material for use as a semiconductor in semiconductor devices, the method comprising the steps of:

depositing a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide on a substrate; and

controlling carrier concentration of the mixture using one of oxygen and nitrogen during the deposition.

23. A method as claimed in claim 22 wherein the step of depositing includes depositing a greater amount of the amorphous semiconductor ionic metal oxide than the amount of amorphous insulating covalent metal oxide.

24. A method as claimed in claim 23 wherein the step of depositing an amorphous semiconductor ionic metal oxide includes depositing an amount greater than approximately 17% of the mixture.

25. A method as claimed in claim 23 wherein the step of depositing includes depositing an amount of amorphous insulating covalent metal oxide sufficient to prevent the amorphous semiconductor ionic metal oxide from becoming poly crystalline at high temperatures.

26. A method as claimed in claim 22 wherein the step of depositing includes depositing an amount of amorphous insulating covalent metal oxide sufficient to prevent the amorphous semiconductor ionic metal oxide from becoming poly crystalline at temperatures in a range of approximately 250°

C. to approximately 700°

C.

27. A method as claimed in claim 22 wherein the step of depositing includes depositing an amount of amorphous insulating covalent metal oxide sufficiently small to allow a continuous network of the amorphous semiconductor ionic metal oxide.

28. A method as claimed in claim 25 wherein the step of depositing includes depositing an amount of amorphous insulating covalent metal oxide greater than approximately 5% of the mixture.

29. A method as claimed in claim 22 wherein the step of depositing includes depositing an amorphous semiconductor ionic metal oxide including one of zinc oxide, indium oxide, tin oxide, and combinations thereof.

30. A method as claimed in claim 22 wherein the step of depositing includes depositing an amorphous insulating covalent metal oxide including one of aluminum oxide, silicon oxide, magnesium oxide, beryllium oxide, boron oxide, and combinations thereof.

31. A method as claimed in claim 22 wherein the step of controlling carrier concentration of the mixture includes using nitrogen during the deposition.