METAL AND SILICON CONTAINING CAPPING LAYERS FOR INTERCONNECTS

• US 20130143401A1
• Filed: 06/01/2012
• Published: 06/06/2013
• Est. Priority Date: 06/03/2011
• Status: Active Grant

• Current Assignee: Novellus Systems Incorporated (Lam Research Corporation)
• Original Assignee: Novellus Systems Incorporated (Lam Research Corporation)
• Inventors: Yu, Jengyi, Jiang, Gengwei, Subramonium, Pramod, Shaviv, Roey, Wu, Hui-Jung, Shankar, Nagraj
• Granted Patent: US 8,753,978 B2
• Time in Patent Office: Days
• US Class Current: 438/643
• CPC Class Codes: H01L 21/02068 during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/76829 characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
• CPC Class Codes: H01L 21/76883 Post-treatment or after-treatment of the conductive material

Abstract

Disclosed methods cap exposed surfaces of copper lines with a layer of metal or metal-containing compound combined with silicon. In some cases, the metal or metal-containing compound forms an atomic layer. In certain embodiments, the methods involve exposing the copper surface first to a metal containing precursor to form an atomic layer of adsorbed precursor or metal atoms, which may optionally be converted to an oxide, nitride, carbide, or the like by, e.g., a pinning treatment. Subsequent exposure to a silicon-containing precursor may proceed with or without metallic atoms being converted.

Claims

1. A method of forming a capping layer on a current carrying metal line of a semiconductor device, the method comprising:

(a) delivering a metal-containing precursor to a reaction chamber holding a partially fabricated semiconductor device having an exposed surface of a metal line, wherein the metal-containing precursor adheres or bonds to the exposed surface of the metal line, wherein the metal-containing precursor comprises a first metal;

(b) delivering a silicon-containing precursor to the reaction chamber; and

(c) forming the capping layer on the metal line by allowing at least a portion of the silicon-containing precursor to interact with the exposed surface of the metal line and/or interact with the metal-containing precursor or first metal.

2. The method of claim 1, wherein the first metal of the metal-containing precursor is different from the metal of the metal line.

3. The method of claim 1, wherein the first metal is selected from the group consisting of aluminum, titanium, magnesium, and calcium.

4. The method of claim 1, wherein operations (b) and (c) overlap in time.

5. The method of claim 1, further comprising cleaning the exposed surface of the metal line prior to performing operation (a).

6. The method of claim 1, further comprising removing an oxide from the exposed surface of the metal line prior to performing operation (a).

7. The method of claim 1, wherein operation (a) comprises a chemical vapor deposition reaction.

8. The method of claim 1, wherein operation (a) results in the first metal depositing on the exposed surface of the metal line.

9. The method of claim 1, further comprising converting at least some of the metal-containing precursor or the first metal on the exposed surface of the metal line to a dielectric material.

10. The method of claim 9, wherein the dielectric material comprises the first metal and an element selected from the group consisting of oxygen, carbon, and nitrogen.

11. The method of claim 9, wherein converting at least some of the layer of the first metal to a dielectric material is performed prior to operation (c).

12. The method of claim 1, wherein the metal-containing precursor is not converted to a dielectric material prior to performing operation (c).

13. The method of claim 1, wherein the silicon containing precursor attaches to the exposed surface of the metal line in interstitial regions where the metal-containing precursor did not adhere or bond to the metal line.

14. The method of claim 1 wherein the metal line comprises copper.

15. The method of claim 1, wherein the metal line comprises an interconnect in the semiconductor device.

16. The method of claim 1, wherein the metal-containing precursor is selected from the group consisting of organoaluminum compounds, organomagnesium compounds, organotitanium compounds, and organocalcium compounds.

17. The method of claim 1, wherein the silicon-containing precursor is selected from the group consisting of silanes and substituted silanes.

18. The method of claim 1, wherein operation (c) is performed in the presence of a plasma.

19. The method of claim 1, further comprising forming a diffusion barrier over the capping layer.

20. The method of claim 19, wherein the diffusion barrier comprises a silicon carbide.

21. The method of claim 1 further comprising:

(i) prior to (a), applying photoresist to a workpiece;

(ii) exposing the photoresist to light;

(iii) patterning the resist and transferring a pattern to the workpiece, wherein the pattern defines locations of the metal lines; and

(iv) selectively removing the photoresist from the work piece

22. An apparatus for forming a capping layer on a current carrying metal line of a semiconductor device, the apparatus comprising:

a reaction chamber comprising a wafer holding element for holding a wafer during processing;

one or more inlets to the reaction chamber for delivering a metal-containing precursor and a silicon-containing precursor; and

a controller comprising instructions for performing the following operations;

(i) delivering a metal-containing precursor to the reaction chamber under conditions in which the metal-containing precursor adheres or bonds to an exposed surface of the metal line on the wafer;

(ii) delivering a silicon-containing precursor to the reaction chamber; and

(iii) forming the capping layer on the metal line by allowing at least a portion of the silicon-containing precursor to interact with the exposed surface as modified by the metal-containing precursor.

23. The apparatus of claim 22, further comprising a plasma generator, wherein the controller further comprises instructions for generating a plasma in the reaction chamber while forming the capping layer.

24. The apparatus of claim 22, wherein the reaction chamber comprises multiple stations, and wherein the controller further comprises instructions for holding the wafer in a first station during operation (i), moving the wafer to a second station, and holding the wafer in the second station during operation (ii).

25. The apparatus of claim 22, further comprising a plasma generator, wherein the controller further comprises instructions for precleaning the wafer prior to operation (i).

26. The apparatus of claim 22, wherein the controller further comprises instructions for converting at least some of the metal-containing precursor, or a metal derived therefrom, on the exposed surface of the metal line to a dielectric material.

27. A system comprising:

the apparatus of claim 22; and

a stepper.