INSTRUCTION PROCESSING METHOD OF NETWORK PROCESSOR AND NETWORK PROCESSOR

• US 20130145122A1
• Filed: 02/11/2013
• Published: 06/06/2013
• Est. Priority Date: 08/30/2010
• Status: Abandoned Application

• Current Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Inventors: Han, Bing, Yin, Gaosong
• Application Number:
  US13/763,811
• Publication Number:
  US 20130145122A1
• Time in Patent Office: Days
• US Class Current: 712/202
• CPC Class Codes: G06F 9/32 Address formation of the next instruction, e.g. by incrementing the instruction counter G06F9/38 takes precedence
• CPC Class Codes: G06F 9/323 for indirect branch instructions
• CPC Class Codes: G06F 9/4486 Formation of subprogram jump address

Abstract

The present invention provides an instruction processing method of a network processor and a network processor. The method includes: when executes a pre-added combined function call instruction, adding an address of its next instruction to a stack top of a first stack; judging, according to the combined function call instruction, whether an enable flag of each additional feature is enabled, and if enabled, adding a function entry address corresponding to an additional feature to the stack top of the first stack; and after finishing judging all enable flags, popping a function entry address in the first stack, and executing a function corresponding to a popped function entry address until the address of the next instruction is popped. In the present invention, only one judgment jump instruction needs to be added to a main line procedure to implement function call of enabled additional features, which saves an instruction execution cycle.

Claims

1. An instruction processing method of a network processor, comprising:

when the network processor executes a pre-added combined function call instruction, adding an address of a next instruction of the combined function call instruction to a stack top of a first stack, wherein the first stack is a preset stack used for calling the combined function;

determining, according to the combined function call instruction, whether an enable flag of each additional feature of the network processor is enabled, and if an enable flag of an additional feature is enabled, adding a function entry address corresponding to the additional feature to the stack top of the first stack; and

after finishing determining enable flags of all additional features, popping the function entry address from the stack top of the stack, wherein the function entry address is added to the first stack, and executing a function corresponding to a popped function entry address until the address of the next instruction of the combined function call instruction is popped.

2. The method according to claim 1, wherein before the network processor executes the pre-added combined function call instruction, further comprising:

storing enable flags of all additional features of the network processor in a first register; and

accordingly, the determining, according to the combined function call instruction, whether the enable flag of each additional feature of the network processor is enabled comprises;

finding the first register according to an address of the first register, wherein the address of the first register is comprised in the combined function call instruction, and judging, according to the number of enable flags, wherein the number of enable flags is comprised in the combined function call instruction, whether each enable flag saved in the first register is enabled.

3. The method according to claim 1, wherein before the network processor executes the pre-added combined function call instruction, further comprising:

saving a function entry address corresponding to each additional feature of the network processor in a corresponding second register respectively; and

accordingly, if the enable flag of the additional feature is enabled, adding the function entry address corresponding to the additional feature to the stack top of the first stack comprises;

if the enable flag of the additional feature is enabled, determining, according to the additional feature, a second register corresponding to the additional feature, and adding the function entry address saved in the second register to the stack top of the first stack, wherein the function entry address is corresponding to the additional feature.

4. The method according to claim 1, comprising:

when the network processor executes a non-combined function call instruction, adding an address of a next instruction of the non-combined function call instruction to a stack top of a second stack;

wherein the second stack is a preset stack used for calling the non-combined function, and the second stack is popped in preference to the first stack.

5. The method according to claim 4, wherein a function corresponding to the non-combined function call instruction is a non-nested function, or is a function that is nested in any function.

6. A network processor, comprising:

a first processing module, configured to, when the network processor executes a pre-added combined function call instruction, add an address of a next instruction of the combined function call instruction to a stack top of a first stack; and

determine, according to the combined function call instruction, whether an enable flag of each additional feature of the network processor is enabled, and if an enable flag of an additional feature is enabled, add a function entry address corresponding to the additional feature to the stack top of the first stack, wherein the first stack is a preset stack used for calling the combined function; and

a second processing module, configured to, after finishing determining enable flags of all additional features, pop the function entry address from the stack top of the stack, wherein the function entry address is added to the first stack, and execute a function corresponding to a popped function entry address until the address of the next instruction of the combined function call instruction is popped.

7. The network processor according to claim 6, comprising:

a first initialization module, configured to store enable flags of all additional features of the network processor in a first register; and

accordingly, the first processing module comprises;

a determining unit, configured to find the first register according to an address of the first register, wherein the address of the first register is comprised in the combined function call instruction, and determine, according to the number of enable flags, wherein the number of enable flags is comprised in the combined function call instruction, whether each enable flag saved in the first register is enabled.

8. The network processor according to claim 6, comprising:

a second initialization module, configured to save a function entry address corresponding to each additional feature of the network processor in a corresponding second register respectively; and

the first processing module comprises;

a push processing unit, configured to, if the enable flag of an additional feature is enabled, determine, according to the additional feature, a second register corresponding to the additional feature, and add the function entry address saved in the second register to the stack top of the first stack, wherein the function entry address is corresponding to the additional feature.

9. The network processor according to claim 6, comprising:

a third processing module, configured to, when the network processor executes a non-combined function call instruction, add an address of a next instruction of the non-combined function call instruction to a stack top of a second stack, wherein the second stack is a preset stack used for calling the non-combined function, and the second stack is popped in preference to the first stack.

10. The network processor according to claim 9, wherein a function corresponding to the non-combined function call instruction is a non-nested function, or is a function that is nested in any function.