TAPE WIRING SUBSTRATE AND CHIP-ON-FILM PACKAGE INCLUDING THE SAME

• US 20130148312A1
• Filed: 09/05/2012
• Published: 06/13/2013
• Est. Priority Date: 12/20/2011
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Jeong-Kyu Ha, Kyong-Soon Cho, Sang-Uk Han
• Inventors: Han, Sang-Uk, Kwon, Young-Shin, Lee, Kwan-Jai, Jung, Jae-Min, Cho, Kyong-Soon, Ha, Jeong-Kyu
• Granted Patent: US 9,113,545 B2
• Time in Patent Office: Days
• US Class Current: 361/736
• CPC Class Codes: H05K 1/028 Bending or folding regions of flexible printed circuits H05K1/0283 takes precedence
• CPC Class Codes: H05K 1/147 at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit H05K1/148 takes precedence
• CPC Class Codes: H05K 1/189 characterised by the use of a flexible or folded printed circuit H05K3/326 takes precedence
• CPC Class Codes: H05K 2201/09036 Recesses or grooves in insulating substrate recess in metallic substrate H05K2201/09745
• CPC Class Codes: H05K 2201/10128 Display
• CPC Class Codes: H05K 3/323 by applying an anisotropic conductive adhesive layer over an array of pads
• CPC Class Codes: H05K 7/00 Constructional details common to different types of electric apparatus casings, cabinets, drawers H05K5/00

Abstract

A tape wiring substrate includes a base film having at least one recess in a first surface of the base film and a chip-mounting region on which a semiconductor chip is included on a second surface of the base film. A wiring pattern is formed on the second surface of the base film and is extended to an edge of the chip-mounting region. A protection film covers the wiring pattern.

Claims

1. A tape wiring substrate comprising:

a base film having a first surface and a second surface opposite the first surface, wherein the first surface comprises at least one recess and the second surface comprises a chip-mounting region on which a semiconductor chip is mounted;

a wiring pattern formed on the second surface of the base film, wherein the wiring pattern is extended to an edge of the chip-mounting region; and

a protection film covering the wiring pattern.

2. The tape wiring substrate of claim 1, wherein the at least one recess comprises a plurality of recesses each of which having substantially the same width, and being separated from each other by predetermined distances.

3. The tape wiring substrate of claim 1, wherein the at least one recess comprises a plurality of recesses each of which having substantially the same width, and being separated by different distances.

4. The tape wiring substrate of claim 1, wherein the at least one recess comprises a plurality of recesses each of which having a different width, and being separated by predetermined distances.

5. The tape wiring substrate of claim 1, wherein the at least one recess comprises only a single recess having a width substantially greater than its depth.

6. The tape wiring substrate of claim 1, wherein the at least one recess comprises a plurality of recesses each having different depths, and separated by predetermined distances from each other.

7. The tape wiring substrate of claim 1, wherein the wiring pattern comprises an input wiring pattern and an output wiring pattern, wherein a first end of the input wiring pattern is extended to an edge of the chip-mounting region, a second end of the input wiring pattern is extended to a first end of the base film, a first end of the output wiring pattern is extended to an edge of the chip-mounting region, and a second end of the output wiring pattern is extended to a second end of the base film.

8. A chip-on-film package comprising:

a tape wiring substrate that comprises;

a base film having a first surface and a second surface opposite the first surface, wherein the first surface comprises at least one recess and the second surface comprises a chip-mounting region on which a semiconductor chip is mounted;

a wiring pattern formed on the second surface of the base film, wherein the wiring pattern is extended to an edge of the chip-mounting region and comprises an input wiring pattern and an output wiring pattern; and

a protection film covering the wiring pattern; and

a semiconductor chip connected to the input wiring pattern and the output wiring pattern through one or more electrode bumps formed on an active surface of the semiconductor chip, the semiconductor chip mounted on the chip-mounting region of the base film,

wherein the input wiring pattern is connected to a printed circuit board and the output wiring pattern is connected to a display panel.

9. The chip-on-film package of claim 8, wherein the base film is bent to have an inner side and an outer side and the at least one recess is formed in the outer side of the base film.

10. The chip-on-film package of claim 9, wherein an end of the output wiring pattern is connected to an upper surface of the display panel.

11. The chip-on-film package of claim 8, wherein the base film is bent to have an inner side and an outer side and the at least one recess is formed in the inner side of the base film.

12. The chip-on-film package of claim 11, wherein an end of the output wiring pattern is connected to an upper surface of the display panel through a via that penetrates the base film.

13. The chip-on-film package of claim 8, further comprising:

a flexible printed circuit (FPC) film; and

a second wiring pattern formed on the FPC film, wherein

a first end of the second wiring pattern is connected to the input wiring pattern and a second end of the second wiring pattern is connected to the printed circuit board.

14. The chip-on-film package of claim 8, wherein the base film comprises a plurality of recesses formed using a polyimide etching process or a laser etching process.

15. The chip-on-film package of claim 8, wherein the output wiring pattern is connected to a flexible panel of an organic light-emitting display device or a liquid crystal display device.

16. A display device, comprising:

a display panel;

a flexible tape wiring substrate having one or more recesses formed thereon, the flexible tape wiring substrate connected to a top surface of the display panel; and

a semiconductor chip mounted on the flexible tape wiring substrate,

wherein the flexible tape wiring substrate is bent such that the semiconductor chip mounted thereon is positioned underneath a bottom surface of the display panel.

17. The display device of claim 16, wherein the flexible tape wiring substrate comprises:

a base film;

a wiring pattern formed over the base film; and

a protective film formed over the wiring pattern.

18. The display device of claim 16, wherein the one or more recesses comprise a plurality of recesses of identical widths and identical spacing, of identical widths and varying spacing, of varying widths and identical spacing, or of varying widths and varying spacing.

19. The display device of claim 16, wherein the one or more recesses comprises only a single recess having a width that is substantially greater than its depth.

20. The display device of claim 16, wherein the semiconductor chip comprises a display driver for driving the display panel.