METHOD OF PROGRAMMING VARIABLE RESISTANCE NONVOLATILE MEMORY ELEMENT

• US 20130148408A1
• Filed: 08/09/2012
• Published: 06/13/2013
• Est. Priority Date: 08/11/2011
• Status: Active Grant

• Current Assignee: Panasonic Semiconductor Solutions Co., Ltd. (Winbond Electronics Corporation)
• Original Assignee: Panasonic Intellectual Property Management Co., Ltd. (Panasonic Holdings Corporation)
• Inventors: Kawai, Ken, Shimakawa, Kazuhiko, Muraoka, Shunsaku, Katoh, Yoshikazu
• Granted Patent: US 8,867,259 B2
• Time in Patent Office: Days
• US Class Current: 365/148
• CPC Class Codes: G11C 13/0007 comprising metal oxide memory material, e.g. perovskites
• CPC Class Codes: G11C 13/004 Reading or sensing circuits or methods
• CPC Class Codes: G11C 13/0064 Verifying circuits or methods
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 2013/0054 Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
• CPC Class Codes: G11C 2013/0073 Write using bi-directional cell biasing
• CPC Class Codes: G11C 2013/0083 Write to perform initialising, forming process, electro forming or conditioning
• CPC Class Codes: G11C 2013/0092 Write characterized by the shape, e.g. form, length, amplitude of the write pulse
• CPC Class Codes: G11C 2213/56 Structure including two electrodes, a memory active layer and a so called passive or source or reservoir layer which is NOT an electrode, wherein the passive or source or reservoir layer is a source of ions which migrate afterwards in the memory active layer to be only trapped there, to form conductive filaments there or to react with the material of the memory active layer in redox way
• CPC Class Codes: G11C 2213/79 Array wherein the access device being a transistor

Abstract

A method of programming a variable resistance nonvolatile memory element that removes a defect in a resistance change, ensures an operation widow, and stably sustains a resistance change operation, the method including: applying, when the detect in the resistance change occurs in the variable resistance nonvolatile memory element, a recovery voltage pulse at least once to the variable resistance nonvolatile memory element, the recovery voltage pulse including: a first recovery voltage pulse that has an amplitude greater than amplitudes of a normal high resistance writing voltage pulse and a low resistance writing voltage pulse; and a second recovery voltage pulse that is the low resistance writing voltage pulse following the first recovery voltage pulse.

Claims

1. A method of programming a variable resistance nonvolatile memory element, the method of programming reversibly changing, by applying a voltage pulse to the variable resistance nonvolatile memory element, a resistance state of the variable resistance nonvolatile memory element,

wherein the variable resistance nonvolatile memory element includes:

a first electrode;

a second electrode; and

an oxygen-deficient transition metal oxide layer provided between the first and second electrodes,

the transition metal oxide layer includes;

a first transition metal oxide layer that is in contact with the first electrode; and

a second transition metal oxide layer that is in contact with the second electrode and has a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first transition metal oxide layer, and

after the variable resistance nonvolatile memory element is manufactured and an initial breakdown voltage pulse having a predetermined amplitude is applied between the first and second electrodes, the variable resistance nonvolatile memory element has characteristics of (i) changing to a low resistance state when a low resistance writing voltage pulse for providing a negative electric potential to the second electrode with respect to the first electrode is applied, and (ii) changing to a high resistance state when a high resistance writing voltage pulse for providing a positive electric potential to the second electrode with respect to the first electrode is applied, the high resistance state being higher in resistance value than the low resistance state,

the method of programming comprising,

in the case where the variable resistance nonvolatile memory element cannot change to the low resistance state and remains in the high resistance state when the low resistance writing voltage pulse is applied to the variable resistance nonvolatile memory element,

applying a recovery voltage pulse to the variable resistance nonvolatile memory element at least once, the recovery voltage pulse including;

a first recovery voltage pulse that has an amplitude greater than an amplitude of the high resistance writing voltage pulse and provides the positive electric potential to the second electrode with respect to the first electrode; and

a second recovery voltage pulse that follows the first recovery voltage pulse and provides the negative electric potential to the second electrode with respect to the first electrode.

2. The method of programming a variable resistance nonvolatile memory element according to claim 1, comprising:

determining whether or not the variable resistance nonvolatile memory element has changed to the low resistance state by the application of the second recovery voltage pulse; and

repeating the applying of a recovery voltage pulse and the determining until the variable resistance nonvolatile memory element changes to the low resistance state.

3. The method of programming a variable resistance nonvolatile memory element according to claim 2, comprising

applying a first re-breakdown voltage pulse to the variable resistance nonvolatile memory element at least once when the variable resistance nonvolatile memory element does not change to the low resistance state even after the applying of a recovery voltage pulse and the determining are repeated a predetermined number of times, the first re-breakdown voltage pulse having an amplitude greater than an amplitude of the first recovery voltage pulse.

4. The method of programming a variable resistance nonvolatile memory element according to claim 2, comprising

applying a breakdown voltage pulse to the variable resistance nonvolatile memory element at least once when the variable resistance nonvolatile memory element does not change to the low resistance state even after the applying of a recovery voltage pulse and the determining are repeated a predetermined number of times, the breakdown voltage pulse including:

a first re-breakdown voltage pulse that has an amplitude greater than an amplitude of the first recovery voltage pulse; and

a second re-breakdown voltage pulse that follows the first re-breakdown voltage pulse and provides the negative electric potential to the second electrode with respect to the first electrode.

5. The method of programming a variable resistance nonvolatile memory element according to claim 1,

wherein the second recovery voltage pulse has an amplitude less than or equal to an amplitude of the low resistance writing voltage pulse.

6. The method of programming a variable resistance nonvolatile memory element according to claim 1,

wherein the first recovery voltage pulse has a pulse width greater than a pulse width of the second recovery voltage pulse.

7. The method of programming a variable resistance nonvolatile memory element according to claim 1,

wherein the first transition metal oxide layer is a layer having a composition expressed as TaO_x, and

the second transition metal oxide layer is a layer having a composition expressed as TaO_y where x<

y.

8. A variable resistance nonvolatile memory device comprising:

a variable resistance nonvolatile memory element including;

a first electrode;

a second electrode; and

an oxygen-deficient transition metal oxide layer provided between the first and second electrodes; and

a drive circuit,

wherein the transition metal oxide layer includes;

a first transition metal oxide layer that is in contact with the first electrode; and

a second transition metal oxide layer that is in contact with the second electrode and has a degree of oxygen deficiency lower than a degree of degree of oxygen deficiency of the first transition metal oxide layer,

after the variable resistance nonvolatile memory element is manufactured and an initial breakdown voltage pulse having a predetermined amplitude is applied between the first and second electrodes, the variable resistance nonvolatile memory element has characteristics of (i) changing to a low resistance state when a low resistance writing voltage pulse for providing a negative electric potential to the second electrode with respect to the first electrode is applied, and (ii) changing to a high resistance state when a high resistance writing voltage pulse for providing a positive electric potential to the second electrode with respect to the first electrode is applied, the high resistance state being higher in resistance value than the low resistance state, and

in the case where the variable resistance nonvolatile memory element cannot change to the low resistance state and remains in the high resistance state when the low resistance writing voltage pulse is applied to the variable resistance nonvolatile memory element, the drive circuit applies a recovery voltage pulse to the variable resistance nonvolatile memory element at least once, the recovery voltage pulse including;

a first recovery voltage pulse that has an amplitude greater than an amplitude of the high resistance writing voltage pulse and provides the positive electric potential to the second electrode with respect to the first electrode; and

a second recovery voltage pulse that follows the first recovery voltage pulse and provides the negative electric potential to the second electrode with respect to the first electrode.

9. The variable resistance nonvolatile memory device according to claim 8,

wherein the drive circuit determines whether or not the variable resistance nonvolatile memory element has changed to the low resistance state by the application of the second recovery voltage pulse, and repeats the application of the recovery voltage pulse and the determination until the variable resistance nonvolatile memory element changes to the low resistance state.

10. The variable resistance nonvolatile memory device according to claim 9,

wherein the drive circuit applies a first re-breakdown voltage pulse to the variable resistance nonvolatile memory element at least once when the variable resistance nonvolatile memory element does not change to the low resistance state even after the application of the recovery voltage pulse and the determination are repeated a predetermined number of times, the first re-breakdown voltage pulse having an amplitude greater than an amplitude of the first recovery voltage pulse.

11. The variable resistance nonvolatile memory device according to claim 9,

wherein the drive circuit applies a breakdown voltage pulse to the variable resistance nonvolatile memory element at least once when the variable resistance nonvolatile memory element does not change to the low resistance state even after the application of the recovery voltage pulse and the determination are repeated a predetermined number of times, the breakdown voltage pulse including:

a first re-breakdown voltage pulse that has an amplitude greater than an amplitude of the first recovery voltage pulse; and

a second re-breakdown voltage pulse that follows the first re-breakdown voltage pulse and provides the negative electric potential to the second electrode with respect to the first electrode.

12. The variable resistance nonvolatile memory device according to claim 8,

wherein the drive circuit applies, as the second recovery voltage pulse, a voltage pulse having an amplitude less than or equal to an amplitude of the low resistance writing voltage pulse, to the variable resistance nonvolatile memory element.

13. The variable resistance nonvolatile memory device according to claim 8,

wherein the drive circuit applies, as the first recovery voltage pulse, a voltage pulse having a pulse width greater than a pulse width of the second recovery voltage pulse, to the variable resistance nonvolatile memory element.

14. The variable resistance nonvolatile memory device according to claim 8,

wherein the first transition metal oxide layer is a layer having a composition expressed as TaO_x, and

the second transition metal oxide layer is a layer having a composition expressed as TaO_y where x<

y.