MULTI-ECU SIMIULATION BY USING 2-LAYER PERIPHERALS WITH LOOK-AHEAD TIME

• US 20130151220A1
• Filed: 07/27/2011
• Published: 06/13/2013
• Est. Priority Date: 08/20/2010
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Shimizu, Shuichi, Matsumura, Ikuo
• Granted Patent: US 9,147,016 B2
• Time in Patent Office: Days
• US Class Current: 703/7
• CPC Class Codes: G05B 17/02 electric
• CPC Class Codes: G06F 11/261 by simulating additional hardware, e.g. fault simulation
• CPC Class Codes: G06F 30/20 Design optimisation, verification or simulation optimisation, verification or simulation of circuit designs G06F30/30

Abstract

A method and system where a plurality of ECU is rapidly executed while avoiding deadlock by performing conservative event synchronization. The simulation system is provided with 4 layers, namely a processor emulator which is an ECU emulator, a plant simulator, a external peripheral scheduler, and a mutual peripheral scheduler. The external peripheral scheduler performs advanced execution of the plant simulator only during processor emulator reaction delay time (or the time until the next event). The notification to perform advanced execution of the processor emulator is provided until the actual plant simulator stop time. The mutual peripheral scheduler provides notification to the processor emulator to perform advanced execution only during communication delay timing between processor emulators (or the time until the next event). The processor emulator conservatively processes until the earliest time of the notification times. Each peripheral proceeds with processing until the earliest time of the accepted events.

Claims

1. A computer implemented simulation system that performs simulation, comprising:

a plurality of processor emulators that run on the computer;

a plurality of plant simulators that run on the computer;

an external peripheral scheduler that runs on the computer, wherein the external peripheral scheduler (i) first runs the plant simulator until the reaction delay time of the processor emulator, and (ii) provides notification through the peripheral emulator to run before the processor emulator until the simulator stop time; and

a mutual peripheral scheduler that runs on the computer and provides notification for running in advance of the processor emulator only for the communication delay time with the processor emulator, wherein the processor emulator performs conservative processing until the notification time.

2. The simulation system according to claim 1, wherein the computer is a multitask system, and the plurality of processor emulators, plurality of plant simulators, external peripheral scheduler, and the mutual peripheral scheduler are executed as individual threads or processes.

3. The simulation system according to claim 2, wherein the computer is a multicore or multiprocessor system, and the plurality of processor emulators, plurality of plant simulators, external peripheral scheduler, and the mutual peripheral scheduler are executed as individual threads or processes assigned to individual processors or cores that differ from the multiprocessor system.

4. The simulation system according to claim 3, wherein the plant simulator and the peripheral emulator that communicates with the plant simulator are assigned to the same core or processor.

5. The simulation system according to claim 1, wherein the plurality of plant simulators have an active plant simulator that spontaneously determined state and a passive plant simulator where the timing is determined on the processor emulator side;

and

wherein the external peripheral scheduler has an external peripheral scheduler for active plant that communicate with the active plant simulator and an external peripheral scheduler for a passive plant that communicates with the passive plant simulator.

6. The simulation system according to claim 1, further comprising a CAN emulator, wherein the CAN emulator is scheduled by the mutual peripheral scheduler.

7. The simulation system according to claim 1, wherein each of the processor emulators operates in conjunction with an internal peripheral scheduler with a queue, and shared memory access deadlock by the plurality of processor emulators is avoided based on the time for the write events in the queue.

8. A computer implemented simulation method that performs simulation, comprising:

executing the plurality of processor emulators on the computer;

executing the plurality of plant simulators on the computer;

executing an external peripheral on the computer, wherein executing an external peripheral (i) first runs the plant simulator until the reaction delay time of the processor emulator, and (ii) provides notification through the peripheral emulator to run before the processor emulator until the simulator stop time; and

executing the a mutual peripheral scheduler that runs on the computer and provides notification for running in advance of the processor emulator only for the communication delay time with the processor emulator, wherein

the processor emulator conservatively proceeds until the notification time.

9. The simulation method according to claim 8, wherein the computer is a multitask system, and the plurality of processor emulators, plurality of plant simulators, external peripheral scheduler, and the mutual peripheral scheduler are executed as individual threads or processes.

10. The simulation method according to claim 9, wherein the computer is a multicore or multiprocessor system, and the plurality of processor emulators, plurality of plant simulators, external peripheral scheduler, and mutual peripheral scheduler are assigned to the individual processors or cores depending on the plurality of multiprocessor system as individual threads or processes.

11. The simulation method according to claim 10, wherein the plant simulator and the peripheral emulator that communicates with the plant simulator are assigned to the same core or processor.

12. The simulation method according to claim 8, wherein the plurality of plant simulators have an active plant simulator that spontaneously determined state, and a passive plant simulator where the timing is determined on the processor emulator side;

and

wherein the external peripheral scheduler has an external peripheral scheduler for active plant that communicate with the active plant simulator, and an external peripheral scheduler for a passive plant that communicates with the passive plant simulator.

13. The simulation method according to claim 8, further comprising a step of executing a CAN emulator, wherein the CAN emulator is scheduled by the mutual peripheral scheduler.

14. The simulation method according to claim 8, wherein each of the processor emulators operates in conjunction with an internal peripheral scheduler with a queue, and shared memory access deadlock by the plurality of processor emulators is avoided based on the time for the write events in the queue.

15. A computer readable storage medium tangibly embodying a computer readable program code having computer readable instructions which, when implemented, cause a computer to carry out the steps of a method comprising:

executing the plurality of processor emulators;

executing the plurality of plant simulators;

executing an external peripheral and first running the plant simulator until the reaction delay time of the processor emulator, and providing notification through the peripheral emulator to run before the processor emulator until the simulator stop time; and

executing a mutual peripheral scheduler that runs on the computer and provides notification for running in advance of the processor emulator only for the communication delay time with the processor emulator;

wherein the processor emulator performs conservative processing until the notification time.

16. The simulation program according to claim 15, wherein the computer is a multitask system, and the plurality of processor emulators, plurality of plant simulators, external peripheral scheduler, and the mutual peripheral scheduler are executed as individual threads or processes.

17. The simulation program according to claim 16, wherein the computer is a multicore or multiprocessor system, and the plurality of processor emulators, plurality of plant simulators, external peripheral scheduler, and mutual peripheral scheduler are assigned to the individual processors or cores depending on the plurality of multiprocessor system as individual threads or processes.

18. The simulation program according to claim 17, wherein the plant simulator and the peripheral emulator that communicates with the plant simulator are assigned to the same core or processor.

19. The simulation program according to claim 15, wherein the plurality of plant simulators have an active plant simulator that spontaneously determined state, and a passive plant simulator where the timing is determined on the processor emulator side;

and

wherein the external peripheral scheduler has an external peripheral scheduler for active plant that communicate with the active plant simulator, and an external peripheral scheduler for a passive plant that communicates with the passive plant simulator.

20. The simulation program according to claim 15, further comprising a step of executing a CAN emulator, wherein the CAN emulator is scheduled by the mutual peripheral scheduler.

21. The simulation program according to claim 15, wherein each of the processor emulators operates in conjunction with an internal peripheral scheduler with a queue, and shared memory access deadlock by the plurality of processor emulators is avoided based on the time for the right events in the queue.