ADAPTIVE CASCODE CIRCUIT USING MOS TRANSISTORS
First Claim
1. An adaptive cascode circuit, comprising:
- a) a main MOS transistor, wherein a source of said main MOS transistor is configured as a first terminal of said adaptive cascode circuit, and wherein a gate of said main MOS transistor is configured as a control terminal of said adaptive cascode circuit;
b) n adaptive MOS transistors coupled in series to a drain of said main MOS transistor, wherein a drain of a first adaptive MOS transistor is configured as a second terminal of said adaptive cascode circuit, and wherein n is an integer greater than one;
c) a shutdown clamping circuit coupled to gates of said n adaptive MOS transistors, wherein said shutdown clamping circuit comprises (n+1) shutdown clamping voltages that are less than corresponding rated drain-gate voltages of said main MOS transistor and said n adaptive MOS transistors; and
d) n conduction clamping circuits coupled to gates of corresponding said n adaptive MOS transistors, wherein said n conduction clamping circuits comprise n conduction clamping voltages greater than corresponding conduction threshold voltages of said adaptive MOS transistors;
e) wherein when said main MOS transistor and said n adaptive MOS transistors are shutdown, and drain-gate voltages of said main MOS transistor and said n adaptive MOS transistors are larger than said shutdown clamping voltages, said shutdown clamping circuit is configured to clamp drain-gate voltages of said main MOS transistor and said adaptive MOS transistors to corresponding said shutdown clamping voltages, wherein said drain-gate voltages of said main MOS transistor and said adaptive MOS transistors are configured to be no larger than said rated drain-gate voltages of said main MOS transistor and said n adaptive MOS transistors;
f) wherein when said n adaptive MOS transistors and said main MOS transistor are conducting, said conduction clamping circuit is configured to clamp said gate voltages of said n adaptive MOS transistors to corresponding said n conduction clamping voltages.
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Accused Products
Abstract
The present invention relates to a cascode circuit using MOS transistors. In one embodiment, an adaptive cascode circuit can include: (i) a main MOS transistor; (ii) n adaptive MOS transistors coupled in series to the drain of the main MOS transistor, where n can be an integer greater than one; (iii) a shutdown clamping circuit connected to the gates of the n adaptive MOS transistors, where the shutdown clamping circuit may have (n+1) shutdown clamping voltages no larger than rated gate-drain voltages of the main MOS transistor and n adaptive MOS transistors; and (iv) n conduction clamping circuits coupled correspondingly to the gates of the adaptive MOS transistors, where the n conduction clamping circuits may have n conduction clamping voltages no larger than the conduction threshold voltages of the adaptive MOS transistors.
13 Citations
12 Claims
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1. An adaptive cascode circuit, comprising:
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a) a main MOS transistor, wherein a source of said main MOS transistor is configured as a first terminal of said adaptive cascode circuit, and wherein a gate of said main MOS transistor is configured as a control terminal of said adaptive cascode circuit; b) n adaptive MOS transistors coupled in series to a drain of said main MOS transistor, wherein a drain of a first adaptive MOS transistor is configured as a second terminal of said adaptive cascode circuit, and wherein n is an integer greater than one; c) a shutdown clamping circuit coupled to gates of said n adaptive MOS transistors, wherein said shutdown clamping circuit comprises (n+1) shutdown clamping voltages that are less than corresponding rated drain-gate voltages of said main MOS transistor and said n adaptive MOS transistors; and d) n conduction clamping circuits coupled to gates of corresponding said n adaptive MOS transistors, wherein said n conduction clamping circuits comprise n conduction clamping voltages greater than corresponding conduction threshold voltages of said adaptive MOS transistors; e) wherein when said main MOS transistor and said n adaptive MOS transistors are shutdown, and drain-gate voltages of said main MOS transistor and said n adaptive MOS transistors are larger than said shutdown clamping voltages, said shutdown clamping circuit is configured to clamp drain-gate voltages of said main MOS transistor and said adaptive MOS transistors to corresponding said shutdown clamping voltages, wherein said drain-gate voltages of said main MOS transistor and said adaptive MOS transistors are configured to be no larger than said rated drain-gate voltages of said main MOS transistor and said n adaptive MOS transistors; f) wherein when said n adaptive MOS transistors and said main MOS transistor are conducting, said conduction clamping circuit is configured to clamp said gate voltages of said n adaptive MOS transistors to corresponding said n conduction clamping voltages. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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Specification