PROCESSOR WITH GARBAGE-COLLECTION BASED CLASSIFICATION OF MEMORY

• US 20130159623A1
• Filed: 12/14/2011
• Published: 06/20/2013
• Est. Priority Date: 12/14/2011
• Status: Active Grant

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Loh, Gabriel H., Breternitz, Mauricio
• Granted Patent: US 8,738,877 B2
• Time in Patent Office: Days
• US Class Current: 711/117
• CPC Class Codes: G06F 12/023 Free address space management
• CPC Class Codes: G06F 12/0253 Garbage collection, i.e. reclamation of unreferenced memory
• CPC Class Codes: G06F 12/06 Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication G06F12/08 takes precedence
• CPC Class Codes: G06F 2206/1012 Load balancing
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/1041 Resource optimization
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays

Abstract

Improved memory management in a processor is provided using garbage collection utilities. The processor includes higher performance memory units and lower performance memory units and a memory management unit. The memory management unit includes a garbage collection utility programmed to identify high use memory blocks and low use memory blocks within the higher and lower performance memory units. The memory management unit is also configured to move the high use memory blocks to higher performance memory and move the low use memory blocks to lower performance memory. The method comprises determining performance characteristics of available memory to identify higher performance memory and lower performance memory. Next memory block use metrics are analyzed to identify high use memory blocks and low use memory blocks. Finally, high use memory blocks are moved to the higher performance memory while the low use memory blocks are moved to the lower performance memory.

Claims

1. A method, comprising:

determining one or more performance characteristics of available memory to identify higher performance memory and lower performance memory;

analyzing memory block use metrics to identify higher use memory blocks and lower use memory blocks; and

moving one or more of the higher use memory blocks to the higher performance memory.

2. The method of claim 1, further comprising compacting memory blocks from one or more memory pages while moving the higher use memory blocks to the higher performance memory.

3. The method of claim 1, wherein determining further comprises identifying the higher performance memory and the lower performance memory using one or more of the following group of memory performance characteristics:

latency;

bandwidth;

power usage;

energy usage;

quality of service;

fairness or endurance.

4. The method of claim 1, wherein analyzing further comprises analyzing metrics collected by a memory garbage collection utility.

5. The method of claim 1, wherein analyzing further comprises identifying the higher use memory blocks and the lower use memory blocks using one or more of the following group of memory block use metrics:

memory read count;

memory read frequency;

duration between memory access;

data corruption characteristics;

memory blocks storing invalid data;

memory erase count and memory programming count.

6. The method of claim 1, further comprising moving one or more of the lower use memory blocks to the lower performance memory.

7. The method of claim 6, wherein the method is repeated to continually move the higher use memory blocks to the higher performance memory and continually move the lower use memory blocks to the lower performance memory.

8. The method of claim 1, further comprising reclaiming some of the higher performance memory and the lower performance memory by executing a memory garbage collection utility.

9. A method, comprising:

analyzing information tracked by a memory garbage collection utility to identify higher use memory blocks and lower use memory blocks; and

moving one or more of the higher use memory blocks to memory having higher performance characteristics.

10. The method of claim 9, further comprising compacting memory blocks from one or more memory pages while moving the higher use memory blocks to the higher performance memory.

11. The method of claim 9, wherein moving the higher use memory blocks further comprises moving the higher use memory blocks to memory having higher performance of one or more of the following group of memory performance characteristics:

latency;

bandwidth;

power usage;

energy usage;

quality of service;

fairness or endurance.

12. The method of claim 9, further comprising moving one or more of the lower use memory blocks to the lower performance memory.

13. The method of claim 12, wherein moving the lower use memory blocks further comprises moving the lower use memory blocks to memory having lower performance of one or more of the following group of memory performance characteristics:

latency;

bandwidth;

power usage;

energy usage;

quality of service;

fairness or endurance.

14. The method of claim 9, wherein analyzing further comprises identifying the higher use memory blocks and the lower use memory blocks using one or more of the following group of garbage collection utility information:

memory read count;

memory read frequency;

duration between memory access;

data corruption characteristics;

memory blocks storing invalid data;

memory erase count and memory programming count.

15. The method of claim 9, wherein the method is repeated to continually move the higher use memory blocks to the higher performance memory and continually move the lower use memory blocks to the lower performance memory.

16. The method of claim 9, further comprising reclaiming some of the higher performance memory and the lower performance memory by executing the memory garbage collection utility.

17. A processor, comprising:

one or more higher performance memory units;

one or more lower performance memory units; and

a memory management unit coupled to the one or more higher performance memory units and the one or more lower performance memory units, the memory management unit comprising;

a garbage collection utility programmed to identify higher use memory blocks and lower use memory blocks within the one or more higher performance memory units and the one or more lower performance memory units; and

a memory move unit responsive to the garbage collection utility to move the higher use memory blocks to higher performance memory.

18. The processor of claim 17, wherein the memory move unit is further configured to move the lower use memory blocks to lower performance memory.

19. The processor of claim 17, wherein the memory management unit is configured to compact memory blocks from one or more memory pages while moving the higher use memory blocks to the higher performance memory.

20. A device comprising the processor of claim 17, the device comprising at least one of a group consisting of:

a computer;

a digital book;

a printer;

a scanner;

a television;

or a set-top box.