INDIRECT INTER-THREAD COMMUNICATION USING A SHARED POOL OF INBOXES

• US 20130160026A1
• Filed: 12/20/2011
• Published: 06/20/2013
• Est. Priority Date: 12/20/2011
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Kuesel, Jamie R., Kupferschmidt, Mark G., Schardt, Paul E., Shearer, Robert A.
• Granted Patent: US 8,990,833 B2
• Time in Patent Office: Days
• US Class Current: 719/313
• CPC Class Codes: G06F 9/546 Message passing systems or structures, e.g. queues

Abstract

A circuit arrangement, method, and program product for communicating data between hardware threads of a network on a chip processing unit utilizes shared inboxes to communicate data to pools of hardware threads. The associated hardware in the pools threads receive data packets from the shared inboxes in response to issuing work requests to an associated shared inbox. Data packets include a source identifier corresponding to a hardware thread from which the data packet was generated, and the shared inboxes may manage data packet distribution to associated hardware threads based on the source identifier of each data packet. A shared inbox may also manage workload distribution and uneven workload lengths by communicating data packets to hardware threads associated with the shared inbox in response to receiving work requests from associated hardware threads.

Claims

1. A method for communicating data in a network on chip (NOC) processing unit that includes a plurality of nodes, each node including a router and an integrated processor block, each integrated processor block including at least one hardware thread, and each hardware thread executing an instance of a stage of a plurality of stages of a software pipeline, wherein the routers of each node are coupled together in an on-chip network, the method comprising:

generating output data from a source hardware thread executing an instance of a first stage of the software pipeline;

packetizing the output data into at least one data packet, each data packet of the at least one data packet including a source identifier associated with the source hardware thread and a first message flag indicating whether the data packet is a first message of a message group, wherein the at least one data packet includes a first data packet having a first message flag indicating that the first data packet is the first message of the message group;

communicating the at least one data packet from the source hardware thread to a shared inbox associated with a pool of destination hardware threads executing instances of a second stage of the software pipeline among the plurality of hardware threads; and

in response to a request from any destination thread among the pool of hardware threads, communicating the first data packet from the shared inbox to an inbox buffer associated with such requesting destination thread and locking data packets stored in the shared inbox having the same source identifier as the first data packet such that the locked data packets may only be communicated to the inbox buffer associated with the requesting destination thread.

2. A method for communicating between a plurality of hardware threads disposed in a plurality of nodes in a network on chip (NOC) processing unit, the method comprising:

communicating a first data packet from a source hardware thread among the plurality of hardware threads to a shared inbox associated with a pool of destination hardware threads among the plurality of hardware threads; and

in response to a request from any destination thread among the pool of hardware threads, communicating the first data packet from the shared inbox to an inbox buffer associated with such requesting destination thread.

3. The method of claim 2, wherein the shared inbox includes a pointer indicating a next available packet stored in the shared inbox, and wherein communicating the first data packet from the shared inbox to the inbox buffer associated with the requesting destination thread is in response to determining that the first data packet is the next available packet in the shared inbox queue based on the pointer.

4. The method of claim 2, wherein each data packet includes a source identifier corresponding to a source hardware thread of the plurality of hardware threads from which the data packet is communicated, each data packet includes an indicator indicating whether the data packet is a first message of a message group, and the indicator of the first data packet indicates that the first data packet is the first message of a respective message group, the method further comprising:

communicating a second data packet from the source hardware thread among the plurality of hardware threads to the shared inbox associated with the pool of destination hardware threads, wherein the first data and the second data packet include the same source identifier corresponding to the source hardware thread; and

in response to communicating the first data packet from the shared inbox to the inbox buffer associated with the requesting destination thread, determining that the second data packet is of the respective message group based on the source identifier included in the second data packet and locking the second data packet, such that the second data packet may only be communicated from the shared inbox to the inbox buffer associated with the requesting destination thread.

5. The method of claim 4, further comprising:

analyzing the indicator of the first data packet to determine whether the first data packet is the first message of the respective message group, and wherein locking the second data packet is in response to determining that the first data packet is the first message of the respective message group.

6. The method of claim 4, further comprising:

communicating the second data packet to the requesting destination thread after communicating the first data packet to the requesting destination thread in response to a request from the requesting destination thread.

7. The method of claim 2, wherein the shared inbox is a first shared inbox associated with a first data type, each data packet includes a payload, and the first data packet is communicated to the first shared inbox in response to determining that the payload of the first data packet is of the first data type.

8. The method of claim 7 further comprising:

communicating a second data packet from the source hardware thread to a second shared inbox associated with a second data type and associated with a pool of destination hardware threads among the plurality of hardware threads in response to determining that the payload of the second data packet is of the second data type.

9. The method of claim 2, further comprising communicating a second data packet from the requesting destination thread to a second shared inbox associated with second pool of second destination hardware threads among the plurality of hardware threads.

10. The method of claim 9, further comprising:

in response to a request from any second destination thread among the second pool of hardware threads, communicating the second data packet from the second shared inbox to an inbox buffer associated with such requesting second destination thread.

11. The method of claim 2, further comprising:

prior to communicating the first data packet to the shared inbox, automatically inserting a source identifier corresponding to the source hardware thread in the first data packet.

12. A circuit arrangement comprising:

a plurality of hardware threads coupled to one another in a network on a chip (NOC) arrangement, the plurality of hardware threads including a pool of destination hardware threads each including an execution unit;

a shared inbox including a memory coupled to the pool of hardware threads and configured to receive a first data packet from a source hardware thread of the plurality of hardware threads and communicate the first data packet to any destination thread among the pool of hardware threads in response to a receiving a request from such requesting destination thread.

13. The circuit arrangement of claim 12, wherein the shared inbox includes a pointer indicating a next available packet stored in the shared inbox, and wherein the shared inbox communicates the first data packet to the requesting destination thread in response to determining that the first data packet is the next available packet in the shared inbox based on the pointer.

14. The circuit arrangement of claim 12, wherein each data packet includes a source identifier corresponding to a source hardware thread of the plurality of source hardware threads from a data packet is communicated, each data packet includes an indicator indicating whether the data packet is a first message of a message group, and the indicator of the first data packet indicates that the first data packet is the first message of a respective message group, wherein the shared inbox is further configured to receive a second data packet from the source hardware thread, and wherein the first data packet and the second data packet include the same source identifier corresponding to the source hardware thread, and the shared inbox is configured to lock the second data packet such that the second data packet may only be communicated to the requesting destination thread in response to communicating the first data packet to the requesting destination thread.

15. The circuit arrangement of claim 14, wherein the shared inbox is further configured to analyze the indicator of the first data packet prior to communicating the first data packet to determine whether the first data packet is the first message of the respective message group and lock the second data packet in response to determining that the first data packet is the first message of the respective message group.

16. The circuit arrangement of claim 14, wherein the shared inbox is further configured to communicate the second data packet to the requesting thread after communicating the first data packet to the requesting thread in response to a request from the requesting destination thread.

17. The circuit arrangement of claim 12, wherein the shared inbox is a first shared inbox associated with a first data type, the pool of hardware threads is a first pool of hardware threads configured to process data of the first data type, each data packet includes a payload, and the source hardware thread is configured to communicate the first data packet to the first shared inbox in response to determining that the payload of the first data packet is of the first data type.

18. The circuit arrangement of claim 17, wherein the plurality of hardware threads includes a second pool of destination hardware threads configured to process data of a second type, the circuit arrangement further comprising:

a second shared inbox including a memory coupled to the second pool of destination hardware threads, wherein the source hardware thread is configured to communicate a second data packet to the second shared inbox in response to determining that the payload of the second data packet is of the second data type.

19. The circuit arrangement of claim 12, wherein the pool of destination hardware threads is a first pool of first destination hardware threads, and the plurality of hardware threads includes a second pool of second destination hardware threads, the circuit arrangement further comprising:

a second shared inbox including a memory coupled to the first and second pool of destination hardware threads and configured to receive a second data packet from any of the first destination hardware threads and communicate the second data packet to any requesting second destination thread in response to receiving a request from such second destination hardware thread.

20. The circuit arrangement of claim 12, wherein the source hardware thread is configured to automatically insert a source identifier corresponding to the source hardware thread in the first data packet prior to transmitting the first data packet to the shared inbox.

21. The circuit arrangement of claim 12, wherein the memory of the shared inbox comprises a content addressable memory.

22. The circuit arrangement of claim 12, where in the memory of the shared inbox includes a data structure storing data that indicates whether a data packet stored in the shared inbox is locked.

23. A program product comprising a computer readable medium and logic definition program code resident on the computer readable medium and defining the circuit arrangement of claim 12.