Electronic Device Including a Tunnel Structure

• US 20130161723A1
• Filed: 02/20/2013
• Published: 06/27/2013
• Est. Priority Date: 06/24/2010
• Status: Active Grant

• Current Assignee: Gregory James Scott, Thierry Coffi Herve Yao
• Original Assignee: Gregory James Scott, Thierry Coffi Herve Yao
• Inventors: Yao, Thierry Coffi Herve, Scott, Gregory James
• Granted Patent: US 8,896,050 B2
• Time in Patent Office: Days
• US Class Current: 257/321
• CPC Class Codes: G11C 16/0433 comprising cells containing a single floating gate transistor and one or more separate select transistors
• CPC Class Codes: G11C 2216/10 Floating gate memory cells with a single polysilicon layer
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/66825 with a floating gate H01L29/6684 takes precedence
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/788 with floating gate H01L29/78391 takes precedence
• CPC Class Codes: H01L 29/94 Metal-insulator-semiconductors, e.g. MOS
• CPC Class Codes: H10B 41/10 characterised by the top-view layout
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 41/60 the control gate being a doped region, e.g. single-poly memory cell

Abstract

An electronic device can include a tunnel structure that includes a first electrode, a second electrode, and tunnel dielectric layer disposed between the electrodes. In a particular embodiment, the tunnel structure may or may not include an intermediate doped region that is at the primary surface, abuts a lightly doped region, and has a second conductivity type opposite from and a dopant concentration greater than the lightly doped region. In another embodiment, the electrodes have opposite conductivity types. In a further embodiment, an electrode can be formed from a portion of a substrate or well region, and the other electrode can be formed over such portion of the substrate or well region.

Claims

1. An electronic device comprising:

a tunnel structure comprising;

a substrate having a primary surface and an active region;

a first electrode including a lightly doped region of the substrate, wherein the first electrode extends to the primary surface and has a first conductivity type;

a second electrode disposed over the first electrode, wherein the second electrode has the first conductivity type;

a tunnel dielectric layer disposed between the first and second electrodes;

a first heavily doped region of the substrate, wherein the first heavily doped region is at the primary surface, abuts the lightly doped region of the first electrode, has the first conductivity type,

wherein;

from a top view, the first heavily doped region is spaced apart from the second electrode; and

at the primary surface within the active region, the second electrode only is disposed over the lightly doped region.

2. The electronic device of claim 1, wherein a dopant concentration of the lightly doped region is no greater than approximately 1×

10¹⁷ atoms/cm³.

3. The electronic device of claim 2, wherein a dopant concentration of the first heavily doped region is at least 1×

10¹⁹ atoms/cm³.

4. The electronic device of claim 1, wherein the first heavily doped region provides an ohmic contact to the lightly doped region.

5. The electronic device of claim 1, wherein at the primary surface within the active region, the second electrode only is disposed over the lightly doped region and the substrate.

6. The electronic device of claim 1, wherein the lightly doped region, the heavily doped region, and substantially all of the second electrode have an n-type conductivity type.

7. The electronic device of claim 1, wherein from a top view, the second electrode is laterally spaced apart from the first heavily doped region.

8. The electronic device of claim 1, further comprising insulating spacers along opposite sides of the second electrode.

9. The electronic device of claim 8, wherein the lightly doped region lies along the primary surface of the substrate at locations closest to the insulating spacers.

10. The electronic device of claim 1, further comprising a field isolation region that defines the active region, wherein the first heavily doped region is disposed within the active region and is immediately adjacent to the field isolation region.

11. The electronic device of claim 1, further comprising a second heavily doped region spaced apart from the first heavily doped region, wherein:

the second electrode has a first side and a second side;

the first heavily doped region is disposed closer to the first side of the second electrode than the second side of the second electrode; and

the second heavily doped region is disposed closer to the second side of the second electrode than the first side of the second electrode.

12. The electronic device of claim 11, wherein substantially all of the second electrode has the first conductivity type.

13. The electronic device of claim 12, wherein the first and second heavily doped regions have substantially a same dopant concentration.

14. The electronic device of claim 11, wherein a first portion of the second electrode has the second conductivity type at the first side of the second electrode, and a second portion of the second electrode has the first conductivity type at the second side.

15. A process of forming an electronic device comprising:

providing a substrate having a primary surface and an active region, wherein;

the active region includes a lightly doped region at the primary surface;

the lightly doped region has a first conductivity type; and

a first electrode of a tunnel structure includes a portion of the lightly doped region;

forming a tunnel dielectric layer over the active region;

forming a second electrode of the tunnel structure over tunnel dielectric layer, wherein at least a part of the second electrode has the first conductivity type; and

forming a first heavily doped region within the active region, wherein;

the first heavily doped region is at the primary surface, abuts the lightly doped region, and has the first conductivity type;

from a top view;

the first heavily doped region is spaced apart from the second electrode; and

the tunnel structure does not include an intermediate doped region between the first heavily doped region and the second electrode.

16. The process of claim 15, further comprising forming an insulating spacer adjacent to a side of the second electrode before forming the first heavily doped region.

17. The process of claim 16, further comprising forming a field isolation region to define the active region.

18. The process of claim 17, wherein forming the first heavily doped region is performed such that the first heavily doped region is self-aligned by a combination of the field isolation region and the insulating spacer.

19. The process of claim 15, further comprising forming a second heavily doped region, wherein:

the second electrode has a first side and a second side;

the first heavily doped region is disposed closer to the first side than the second side; and

the second heavily doped region is disposed closer to the second side than the first side.

20. The process of claim 19, wherein forming the second electrode is performed such that substantially all of the second electrode has the first conductivity type.