DIFFERENTIAL POWER MANAGEMENT AND POWER AMPLIFIER ARCHITECTURE

• US 20130162352A1
• Filed: 06/25/2012
• Published: 06/27/2013
• Est. Priority Date: 06/24/2011
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: RF Micro Devices Incorporated (Qorvo, Inc.)
• Inventors: Khlat, Nadim
• Granted Patent: US 8,760,228 B2
• Time in Patent Office: Days
• US Class Current: 330/252
• CPC Class Codes: H03F 1/0227 using supply converters
• CPC Class Codes: H03F 2200/459 Ripple reduction circuitry being used in an amplifying circuit
• CPC Class Codes: H03F 2200/537 A transformer being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/21 with semiconductor devices only H03F3/245 takes precedence
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/45071 with semiconductor devices only

Abstract

Embodiments of the present disclosure relate to radio frequency (RF) transmitter circuitry, which includes non-inverting path power amplifier (PA) circuitry, inverting path PA circuitry, and RF transformer circuitry. The non-inverting path PA circuitry provides a non-inverting RF signal and a first power supply (PS) signal to the RF transformer circuitry, such that the first PS signal has a first ripple voltage. The inverting path PA circuitry provides an inverting RF signal and a second PS signal to the RF transformer circuitry, such that the second PS signal has a second ripple voltage. The RF transformer circuitry additively combines the non-inverting RF signal and the inverting RF signal to provide an RF output signal, such that effects of the first ripple voltage and the second ripple voltage are substantially cancelled from the RF output signal.

Claims

1. Circuitry comprising:

non-inverting path power amplifier (PA) circuitry adapted to;

provide a non-inverting radio frequency (RF) signal to RF transformer circuitry; and

provide a first power supply (PS) signal to the RF transformer circuitry, such that the first PS signal has a first ripple voltage;

inverting path PA circuitry adapted to;

provide an inverting RF signal to the RF transformer circuitry; and

provide a second PS signal to the RF transformer circuitry, such that the second PS signal has a second ripple voltage; and

the RF transformer circuitry adapted to additively combine the non-inverting RF signal and the inverting RF signal to provide an RF output signal, such that effects of the first ripple voltage and the second ripple voltage are substantially cancelled from the RF output signal.

2. The circuitry of claim 1 wherein an amplitude of the RF output signal is about equal to a sum of an amplitude of the non-inverting RF signal and an amplitude of the inverting RF signal.

3. The circuitry of claim 1 wherein:

the non-inverting path PA circuitry comprises a non-inverting path final stage adapted to provide the non-inverting RF signal; and

the inverting path PA circuitry comprises an inverting path final stage adapted to provide the inverting RF signal.

4. The circuitry of claim 3 wherein:

the non-inverting path final stage is an open collector amplifier stage; and

the inverting path final stage is an open collector amplifier stage.

5. The circuitry of claim 1 wherein the RF transformer circuitry comprises:

a first primary winding adapted to receive the non-inverting RF signal and the first PS signal;

a first secondary winding magnetically coupled to the first primary winding;

a second primary winding adapted to receive the inverting RF signal and the second PS signal; and

a second secondary winding magnetically coupled to the second primary winding, such that the first secondary winding and the second secondary winding are coupled in series and adapted to provide the RF output signal.

6. The circuitry of claim 5 wherein:

a first end of the first primary winding is adapted to receive the non-inverting RF signal;

a first end of the second primary winding is adapted to receive the inverting RF signal;

a first end of the first secondary winding is adapted to provide the RF output signal;

a first end of the second secondary winding is coupled to a ground;

a second end of the first secondary winding is coupled to a second end of the second secondary winding;

the first end of the first secondary winding is about phase-aligned to the first end of the first primary winding; and

the first end of the second secondary winding is about phase-aligned to the first end of the second primary winding.

7. The circuitry of claim 1 wherein:

the first PS signal has a first average voltage; and

the second PS signal has a second average voltage, such that the second average voltage is about equal to the first average voltage.

8. The circuitry of claim 1 wherein the second ripple voltage is phase-shifted from the first ripple voltage by about 180 degrees.

9. The circuitry of claim 8 wherein a waveshape of the second ripple voltage is about equal to a waveshape of the first ripple voltage.

10. The circuitry of claim 1 wherein:

the non-inverting RF signal and the inverting RF signal have amplitude modulation;

the first PS signal and the second PS signal have amplitude modulation to provide envelope tracking; and

a phase shift between the first ripple voltage and the second ripple voltage is adjusted based on the amplitude modulation of the first PS signal and the second PS signal.

11. The circuitry of claim 1 further comprising switching control circuitry, such that the non-inverting path PA circuitry is coupled between the switching control circuitry and the RF transformer circuitry, and the inverting path PA circuitry is coupled between the switching control circuitry and the RF transformer circuitry.

12. The circuitry of claim 11 wherein:

the non-inverting path PA circuitry comprises a non-inverting path capacitive element and a non-inverting path inductive element, which is coupled between the non-inverting path capacitive element and the switching control circuitry;

the inverting path PA circuitry comprises an inverting path capacitive element and an inverting path inductive element, which is coupled between the inverting path capacitive element and the switching control circuitry;

the non-inverting path capacitive element is adapted to provide the first PS signal; and

the inverting path capacitive element is adapted to provide the second PS signal.

13. The circuitry of claim 12 wherein:

an input to the non-inverting path inductive element has a first inductor input voltage, such that the first ripple voltage is based on the first inductor input voltage;

an input to the inverting path inductive element has a second inductor input voltage, such that the second ripple voltage is based on the second inductor input voltage; and

the second inductor input voltage is phase-shifted from the first inductor input voltage by about 180 degrees.

14. The circuitry of claim 13 wherein:

the first inductor input voltage is a periodic signal, such that during a first switching cycle period, the first inductor input voltage has a first peak voltage followed by a first valley voltage;

the second inductor input voltage is a periodic signal, such that during a second switching cycle period, the second inductor input voltage has a second peak voltage followed by a second valley voltage; and

the second switching cycle period is about equal to the first switching cycle period.

15. The circuitry of claim 14 wherein:

the first inductor input voltage has the first peak voltage for a first discharge duration;

the first inductor input voltage has the first valley voltage for a first charge duration;

the second inductor input voltage has the second peak voltage for a second discharge duration;

the second inductor input voltage has the second valley voltage for a second charge duration;

the second discharge duration is about equal to the first discharge duration;

the second charge duration is about equal to the first charge duration; and

the second peak voltage is about equal to the first peak voltage.

16. The circuitry of claim 12 wherein:

an input to the non-inverting path inductive element has a first inductor input voltage, such that the first ripple voltage is based on the first inductor input voltage;

an input to the inverting path inductive element has a second inductor input voltage, such that the second ripple voltage is based on the second inductor input voltage; and

the second inductor input voltage is about phase-aligned to the first inductor input voltage.

17. The circuitry of claim 16 wherein:

the first inductor input voltage is a periodic signal, such that during a first switching cycle period, the first inductor input voltage has a first peak voltage followed by a first valley voltage;

the second inductor input voltage is a periodic signal, such that during a second switching cycle period, the second inductor input voltage has a second valley voltage followed by a second peak voltage;

the second switching cycle period is about equal to the first switching cycle period; and

the second switching cycle period is about phase-aligned to the first switching cycle period.

18. The circuitry of claim 17 wherein:

the first inductor input voltage has the first peak voltage for a first discharge duration;

the first inductor input voltage has the first valley voltage for a first charge duration;

the second inductor input voltage has the second peak voltage for a second discharge duration;

the second inductor input voltage has the second valley voltage for a second charge duration;

the second charge duration is about equal to the first discharge duration; and

the second discharge duration is about equal to the first charge duration.

19. The circuitry of claim 18 wherein:

a first difference is equal to the first peak voltage minus the first valley voltage;

a second difference is equal to the second peak voltage minus the second valley voltage;

a first product is equal to the first difference times the first discharge duration;

a second product is equal to the second difference times the second discharge duration; and

the second product is about equal to the first product.

20. The circuitry of claim 18 wherein:

the first valley voltage is equal to about zero;

the second valley voltage is equal to about zero;

a first product is equal to the first peak voltage times the first discharge duration;

a second product is equal to the second peak voltage times the second discharge duration; and

the second product is about equal to the first product.

21. A method comprising:

providing a non-inverting radio frequency (RF) signal to RF transformer circuitry;

providing a first power supply (PS) signal to the RF transformer circuitry, such that the first PS signal has a first ripple voltage;

providing an inverting RF signal to the RF transformer circuitry;

providing a second PS signal to the RF transformer circuitry, such that the second PS signal has a second ripple voltage; and

additively combining the non-inverting RF signal and the inverting RF signal to provide an RF output signal, such that effects of the first ripple voltage and the second ripple voltage are substantially cancelled from the RF output signal.

22. Circuitry comprising:

non-inverting path power amplifier (PA) circuitry adapted to;

provide a non-inverting radio frequency (RF) signal to RF transformer circuitry; and

provide a first power supply (PS) signal to the RF transformer circuitry, such that the first PS signal has a first ripple voltage; and

inverting path PA circuitry adapted to;

provide an inverting RF signal to the RF transformer circuitry; and

provide a second PS signal to the RF transformer circuitry, such that the second PS signal has a second ripple voltage, the RF transformer circuitry is adapted to additively combine the non-inverting RF signal and the inverting RF signal to provide an RF output signal, wherein effects of the first ripple voltage and the second ripple voltage are substantially cancelled from the RF output signal.

23. The circuitry of claim 22 further comprising a semiconductor die, which comprises at least a portion of the non-inverting path PA circuitry and at least a portion of the inverting path PA circuitry.

24. The circuitry of claim 23 wherein the semiconductor die comprises Silicon Germanium.