INVERTER DEVICE, NAND DEVICE, NOR DEVICE, AND LOGIC DEVICE INCLUDING THE SAME

• US 20130168640A1
• Filed: 08/30/2012
• Published: 07/04/2013
• Est. Priority Date: 01/03/2012
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: KIM, Sang-wook, PARK, Seong-jun, SEO, David, LEE, Chang-seung, YUN, Young-jun, LEE, Yung-hee Yvette
• Granted Patent: US 9,130,567 B2
• Time in Patent Office: Days
• US Class Current: 257/29
• CPC Class Codes: H03K 19/20 characterised by logic function, e.g. AND, OR, NOR, NOT circuits H03K19/003 - H03K19/01 take precedence

Abstract

An inverter device including a tunable diode device and a diode device that includes a control terminal connected to an input terminal of the inverter device, an anode terminal connected to a high-level voltage terminal, and a cathode terminal connected to an output terminal of the inverter device, wherein the diode device is configured to turn on or off according to a voltage applied to the control terminal.

Claims

1. An inverter device including an input terminal and an output terminal, the inverter device configured to invert a signal from the input terminal and output an inverted signal at the output terminal, and the inverter device comprising:

a diode device including a control terminal connected to the input terminal of the inverter device, an anode terminal connected to a logic high-level voltage terminal, and a cathode terminal connected to the output terminal of the inverter device,

wherein the diode device is configured to turn on or off according to a voltage applied to the control terminal.

2. The inverter device of claim 1, wherein, when a low-level voltage is applied to the control terminal, the diode device is turned on, and when a logic high-level voltage is applied to the control terminal, the diode device is turned off.

3. The inverter device of claim 2, wherein, when a low-level voltage is applied to the input terminal, the diode device is turned on, such that a logic high-level voltage is output to the output terminal, and

when a logic high-level voltage is applied to the input terminal, the diode device is turned off, such that a low-level voltage is output to the output terminal.

4. The inverter device of claim 1, further comprising:

a resistive device that is connected between the output terminal and a low-level voltage terminal.

5. The inverter device of claim 4, wherein, when a low-level voltage is applied to the input terminal, the diode device is turned on, and a current path is formed from the logic high-level voltage terminal to the resistive device, such that a logic high-level voltage is output to the output terminal, and

when a logic high-level voltage is applied to the input terminal, the diode device is turned off, and a current path is formed from the low-level voltage terminal to the resistive device, such that a low-level voltage is output to the output terminal.

6. A logic device comprising the inverter device of claim 1.

7. The inverter device of claim 1, wherein the diode device includes a graphene material.

8. A NAND device including a first input terminal, a second input terminal, and an output terminal, the NAND device configured to perform a NAND operation based on signals from the first and second input terminals and output a result of the NAND operation to the output terminal, the NAND device comprising:

a first diode device including a first control terminal, a first anode terminal, and a first cathode terminal, the first diode device configured to turn on or off according to a voltage applied to the first control terminal; and

a second diode device including a second control terminal, a second anode terminal, and a second cathode terminal, the second diode device configured to turn on or off according to a voltage applied to the second control terminal,

wherein the first diode device and the second diode device are connected in parallel between a logic high-level voltage terminal and the output terminal.

9. The NAND device of claim 8, wherein the first control terminal of the first diode device is connected to the first input terminal of the NAND device, the first anode terminal of the first diode device is connected to the logic high-level voltage terminal, and the first cathode terminal of the first diode device is connected to the output terminal of the NAND device, and

the second control terminal of the second diode device is connected to the second input terminal of the NAND device, the second anode terminal of the second diode device is connected to the logic high-level voltage terminal, and the second cathode terminal of the second diode device is connected to the output terminal of the NAND device.

10. The NAND device of claim 9, wherein, when a low-level voltage is applied to the first control terminal, the first diode device is turned on, and when a logic high-level voltage is applied to the first control terminal, the first diode device is turned off, and

when a low-level voltage is applied to the second control terminal, the second diode device is turned on, and when a logic high-level voltage is applied to the second control terminal, the second diode device is turned off.

11. The NAND device of claim 10, wherein, when a low-level voltage is applied to at least one of the first input terminal and the second input terminal, at least one of the first diode device and the second diode device is turned on, such that a logic high-level voltage is output to the output terminal, and

when a logic high-level voltage is applied to both the first input terminal and the second input terminal, both the first diode device and the second diode device are turned off, such that a low-level voltage is output to the output terminal.

12. The NAND device of claim 9, further comprising:

a resistive device that is connected between the output terminal and a low-level voltage terminal.

13. The NAND device of claim 12, wherein, when a low-level voltage is applied to at least one of the first input terminal and the second input terminal, at least one of the first diode device and the second diode device is turned on, and a current path is formed from the logic high-level voltage terminal to the resistive device, such that a logic high-level voltage is output to the output terminal, and

when a logic high-level voltage is applied to both the first input terminal and the second input terminal, both the first diode device and the second diode device are turned off, and a current path is formed from the low-level voltage terminal to the resistive device, such that a low-level voltage is output to the output terminal.

14. A logic device comprising the NAND device of claim 8.

15. The NAND device of claim 8, wherein the first diode device and the second diode device include a graphene material.

16. A NOR device including a first input terminal, a second input terminal, and an output terminal, the NOR device configured to perform a NOR operation based on signals from the first and second input terminals and output a result of the NOR operation to the output terminal, the NOR device comprising:

a first diode device including a first control terminal, a first anode terminal, and a first cathode terminal, the first diode device configured to turn on or off according to a voltage applied to the first control terminal; and

a second diode device including a second control terminal, a second anode terminal, and a second cathode terminal, the second diode device configured to turn on or off according to a voltage applied to the second control terminal,

wherein the first diode device and the second diode device are connected in series between a logic high-level voltage terminal and the output terminal.

17. The NOR device of claim 16, wherein the first control terminal of the first diode device is connected to the first input terminal of the NOR device, the first anode terminal of the first diode device is connected to the logic high-level voltage terminal, and the first cathode terminal of the first diode device is connected to the second anode terminal of the second diode device, and

the second control terminal of the second diode device is connected to the second input terminal of the NOR device, the second anode terminal of the second diode device is connected to the first cathode terminal of the first diode device, and the second cathode terminal of the second diode device is connected to the output terminal of the NOR device.

18. The NOR device of claim 17, wherein, when a low-level voltage is applied to the first control terminal, the first diode device is turned on, and when a logic high-level voltage is applied to the first control terminal, the first diode device is turned off, and

when a low-level voltage is applied to the second control terminal, the second diode device is turned on, and when a logic high-level voltage is applied to the second control terminal, the second diode device is turned off.

19. The NOR device of claim 18, wherein, when a low-level voltage is applied to both the first input terminal and the second input terminal, both the first diode device and the second diode device are turned on, such that a logic high-level voltage is output to the output terminal, and

when a logic high-level voltage is applied to at least one of the first input terminal and the second input terminal, the first diode device or the second diode device is turned off, such that a low-level voltage is output to the output terminal.

20. The NOR device of claim 17, further comprising:

a resistive device connected between the output terminal and a low-level voltage terminal.

21. The NOR device of claim 20, wherein, when a low-level voltage is applied to both the first input terminal and the second input terminal, both the first diode device and the second diode device are turned on, and a current path is formed from the logic high-level voltage terminal to the resistive device, such that a logic high-level voltage is output to the output terminal, and

when a logic high-level voltage is applied to at least one of the first input terminal and the second input terminal, the first diode device or the second diode device is turned off, and a current path is formed from the low-level voltage terminal to the resistive device, such that a low-level voltage is output to the output terminal.

22. A logic device comprising the NOR device of claim 16.

23. The NOR device of claim 16, wherein the first diode device and the second diode device include a graphene material.

24. A controlled inverter device, comprising:

a diode device including a control terminal connected to an input terminal of the tunable inverter device, an anode terminal configured to receive a control signal, and a cathode terminal connected to the output terminal of the tunable inverter device,

wherein the diode device is configured to turn on or off according to a voltage of the control signal and a voltage applied to the control terminal.

25. The controlled inverter device of claim 24, wherein the control signal is a reference voltage.

26. The controlled inverter device of claim 24, wherein the control signal is a logic high-level voltage.

27. The controlled inverter device of claim 24, wherein the diode device includes a graphene material.