TRENCH MOSFET WITH RESURF STEPPED OXIDE AND DIFFUSED DRIFT REGION

• US 20130168760A1
• Filed: 12/30/2011
• Published: 07/04/2013
• Est. Priority Date: 12/30/2011
• Status: Active Grant

• Current Assignee: Force Mos Technology Co., Ltd.
• Original Assignee: Force Mos Technology Co., Ltd.
• Inventors: HSIEH, Fu-Yuan
• Granted Patent: US 8,587,054 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/42372 characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out H01L29/42324 takes precedence
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trench MOSFET with split gates and diffused drift region for on-resistance reduction is disclosed. Each of the split gates is symmetrically disposed in the middle of the source electrode and adjacent trench sidewall of a deep trench. The inventive structure can save a mask for definition of the location of the split gate electrodes. Furthermore, the fabrication method can be implemented more reliably with lower cost.

Claims

1. A trench MOSFET comprising:

a substrate of a first conductivity type;

an epitaxial layer of said first conductivity type onto said substrate, said epitaxial layer having a lower doping concentration than said substrate;

a plurality of gate trenches formed from a top surface of said epitaxial layer and extending downward into said epitaxial layer in an active area;

a first gate insulation layer formed along trench sidewalls of a lower portion of each of said gate trenches;

a source electrode formed within each of said gate trenches and surrounded by said first gate insulation layer in said lower portion of each of said gate trenches;

a second gate insulation layer formed at least along trench sidewalls of an upper portion of each of said gate trenches and upper sidewalls of said source electrode above said first gate insulation layer, said second gate insulation layer having a thinner thickness than said first gate insulation layer; and

a pair of split gate electrodes disposed adjacent to said second gate insulation layer and above said first gate insulation layer in said upper portion of each of said gate trenches, wherein each of said split gate electrodes disposed in the middle between said source electrode and adjacent trench sidewall of said gate trenches.

2. The trench MOSFET of claim 1 further comprising:

a diffused drift region of said first conductivity and having a higher doping concentration than said epitaxial layer, disposed in a mesa between two adjacent said gate trenches;

a body region of a second conductivity type formed in said mesa, above a top surface of said diffused drift region; and

a source region of said first conductivity type formed near a top surface of said body region and adjacent to said split gate electrodes.

3. The trench MOSFET of claim 2, wherein said diffused drift region has a higher doping concentration near trench sidewalls of said gate trenches than in the center of said mesa.

4. The trench MOSFET of claim 1, wherein said source electrode and said split gate electrodes comprise a doped poly-silicon of said first conductivity type.

5. The trench MOSFET of claim 1, wherein said source electrode comprises a doped poly-silicon of a second conductivity type and said split gate electrodes comprise a doped poly-silicon of said first conductivity type.

6. The trench MOSFET of claim 1, wherein trench bottoms of said gate trenches are above a common interface between said substrate and said epitaxial layer.

7. The trench MOSFET of claim 1, wherein said gate trenches further extend into said substrate.

8. The trench MOSFET of claim 2 further comprising a trenched source-body contact filled with a contact metal plug and penetrating through said source region and extending into said body region;

and a body contact doped region of said second conductivity type within said body region and surrounding at least bottom of said trenched source-body contact underneath said source region, wherein said body contact doped region has a higher doping concentration than said body region.

9. The trench MOSFET of claim 2 further comprising a termination area which comprises a guard ring connected with said source region, and multiple floating guard rings having floating voltage, wherein said guard ring and said multiple floating guard rings of said second conductivity type have junction depths greater than said body region.

10. The trench MOSFET of claim 2 further comprising a termination area which comprises multiple floating trenched gates each having floating voltage and being spaced apart by said mesa comprising said body region and said diffused drift region;

and said floating trenched gates each comprising a source electrode and a pair of split gate electrodes which are the same as those in said gate trenches.

11. The trench MOSFET of claim 2 further comprising a termination area which comprises multiple floating trenched gates each having floating voltage and being spaced apart by said mesa comprising said diffused drift region without having said body region;

and said floating trenched gates each comprising a source electrode and a pair of split gate electrodes which are the same as those in said gate trenches.

12. The trench MOSFET of claim 8, wherein said contact metal plug is a tungsten metal layer padded by a barrier metal layer of Ti/TiN or Co/TiN.

13. The trench MOSFET of claim 8, wherein said contact metal plug is Al alloys or Cu padded by a barrier metal layer of Ti/TiN or Co/TiN or Ta/TiN, wherein said contact metal plug also extends onto a contact interlayer to be respectively formed as a source metal or a gate metal.

14. The trench MOSFET of claim 2, wherein said source region has a uniform doping concentration and junction depth between sidewalls of said trenched source-body contacts to adjacent channel regions near trench sidewalls of said gate trenches.

15. The trench MOSFET of claim 2, wherein said source region has a higher doping concentration and a greater junction depth along sidewalls of said trenched source-body contact than along adjacent channel regions near trench sidewalls of said gate trenches, and said source region has a Gaussian-distribution doping profile from the sidewalls of said trenched source-body contact to said adjacent channel regions near trench sidewalls of said gate trenches.

16. The trench MOSFET of claim 2 further comprising at least a trenched source electrode contact filled with said contact metal plug and connecting said source electrode to a source metal.

17. The trench MOSFET of claim 2 further comprising at least a gate contact trench filling with a source electrode and a pair of split gate electrodes for gate connection, and further comprising at least a trenched gate contact filled with said contact metal plug and extending into said split gate electrodes in said gate contact trench to connect said split gate electrodes to a gate metal.

18. A trench MOSFET comprising:

a substrate of a first conductivity type;

an epitaxial layer of said first conductivity type onto said substrate, said epitaxial layer having a lower doping concentration than said substrate;

a plurality of gate trenches formed from a top surface of said epitaxial layer and extending downward into said epitaxial layer in an active area;

a first gate insulation layer formed along trench sidewalls of a lower portion of each of said gate trenches;

a source electrode formed within each of said gate trenches and surrounded by said first gate insulation layer in said lower portion of each of said gate trenches;

a second gate insulation layer formed at least along trench sidewalls of an upper portion of each of said gate trenches and upper sidewalls of said source electrode above said first gate insulation layer, said second gate insulation layer having a thinner thickness than said first gate insulation layer;

a pair of split gate electrodes of said first conductivity type disposed adjacent to said second gate insulation layer and above said first gate insulation layer in said upper portion of each of said gate trenches, wherein each of said split gate electrodes disposed in the middle between said source electrode and adjacent trench sidewall in said gate trenches;

a diffused drift region of said first conductivity and having a higher doping concentration than said epitaxial layer, disposed in a mesa between two adjacent said gate trenches;

said diffused drift region having a higher doping concentration near trench sidewalls of said gate trenches than in the center of said mesa;

a body region of a second conductivity type formed in said mesa, above a top surface of said diffused drift region; and

a source region of said first conductivity type formed near a top surface of said body region and adjacent to said split gate electrodes.

19. The trench MOSFET of claim 18, wherein said source electrode and said split gate electrodes comprise a doped poly-silicon of said first conductivity type.

20. The trench MOSFET of claim 18, wherein said source electrode comprises a doped poly-silicon of said second conductivity type and said split gate electrodes comprise a doped poly-silicon of said first conductivity type.

21. A Method for manufacturing a super-junction trench MOSFET comprising the steps of:

growing an epitaxial layer of a first conductivity type upon a substrate of said first conductivity type, wherein said epitaxial layer having a lower doping concentration than said substrate;

forming a hard mask onto a top surface of said epitaxial layer for definition of a plurality of gate trenches;

forming said a plurality of gate trenches, and mesas between every two adjacent gate trenches in said epitaxial layer by etching through open regions in said hard mask;

keeping said hard mask substantially covering said mesas after formation of said gate trenches to block sequential angle ion implantation into top surfaces of said mesas;

carrying out an angle Ion Implantation of said first conductivity type dopant into said mesas through trench sidewalls of said gate trenches followed by a diffusion step to form a plurality of diffused drift regions in said mesas;

removing said hard mask after formation of said diffused drift regions;

forming a thick oxide layer along inner surfaces of said gate trenches by thermal oxide growth or oxide deposition;

depositing a first doped poly-silicon layer to fill each of said gate trenches to serve as a source electrode;

etching back said source electrodes from the top surface of said epitaxial layer;

removing said thick oxide layer from the top surface of said epitaxial layer and from an upper portion of said gate trenches;

forming a thin oxide layer as a gate oxide covering a top surface of said thick oxide layer, along upper inner surfaces of said gate trenches and along sidewalls of said source electrodes above the top surface of said thick oxide layer;

depositing a second doped poly-silicon layer filling the upper portion of said gate trenches to serve as split gate electrodes;

etching back said split gate electrodes by CMP or plasma etch;

carrying out a body implantation of a second conductivity type dopant and a step of body diffusion to form body regions;

applying a source mask; and

carrying out a source implantation of said first conductivity type dopant and a source diffusion to form source regions.

22. The method of claim 21, wherein said gate trenches are extending into said substrate.

23. The method of claim 21, wherein said gate trenches have trench bottoms disposed above said substrate.

24. The method of claim 21, further comprising:

prior to carrying out the angle Ion Implantations of said first conductivity type dopant, forming a screen oxide along the inner surfaces of said gate trenches.

25. The method of claim 24, further comprising:

prior to forming said screen oxide, forming a sacrificial oxide layer and removing said sacrificial oxide to eliminate plasma damage after forming said gate trenches.

26. The method of claim 21, after forming said source regions, further comprising:

forming a contact interlayer;

forming a plurality of trenched source-body contacts penetrating through said contact interlayer, said source regions and extending into said body regions;

forming body contact doped regions of said second conductivity type in said body regions and surrounding at least bottoms of said trenched source-body contacts, said body contact doped regions having a heavier doping concentration than said body regions.

27. The method of claim 26, after forming said body contact doped regions, further comprising:

depositing a tungsten metal layer padded by a barrier metal layer in said trenched source-body contacts.

28. The method of claim 26, after forming said body contact doped regions, further comprising:

depositing a source metal layer padded with a barrier metal layer into said trenched source-body contacts.