INTEGRATED CIRCUITS INCLUDING INDUCTORS

• US 20130168810A1
• Filed: 02/25/2013
• Published: 07/04/2013
• Est. Priority Date: 02/23/2011
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: CHO, Hsiu-Ying
• Granted Patent: US 9,412,805 B2
• Time in Patent Office: Days
• US Class Current: 257/531
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An integrated circuit includes a substrate having a surface and an inductor disposed over the surface of the substrate. The inductor includes a first conductive line disposed over the surface and first conductive structures disposed over and electrically coupled with the first conductive line. The inductor includes second conductive structures disposed over and electrically coupled with the first conductive structures. The inductor includes a second conductive line disposed over and electrically coupled with the second conductive structures. The inductor includes third conductive structures disposed over and electrically coupled with the first conductive line and at least one fourth conductive structure disposed over and electrically coupled with the third conductive structures. The inductor includes a third conductive line disposed over and electrically coupled with the at least one fourth conductive structure, the third conductive line extending substantially parallel to the second conductive line.

Claims

1. An integrated circuit comprising:

a substrate having a surface; and

an inductor disposed over the surface of the substrate, the inductor configured to generate a magnetic field substantially parallel to the surface, wherein the inductor comprises;

a first conductive line disposed over the surface;

a plurality of first conductive structures disposed over and electrically coupled with the first conductive line, each of the plurality of first conductive structures having a first cross-sectional shape;

a plurality of second conductive structures disposed over and electrically coupled with a respective one of the plurality of first conductive structures, each of the plurality of second conductive structures having a second cross-sectional shape different from the first cross-sectional shape;

a second conductive line disposed over and electrically coupled with the plurality of second conductive structures;

a plurality of third conductive structures disposed over and electrically coupled with the first conductive line, each of the plurality of third conductive structures having a third cross-sectional shape;

at least one fourth conductive structure disposed over and electrically coupled with a respective one of the plurality of third conductive structures, each of the at least one fourth conductive structures having a fourth cross-sectional shape different from the third cross-sectional shape; and

a third conductive line disposed over and electrically coupled with the at least one fourth conductive structure, the third conductive line extending substantially parallel to the second conductive line.

2. The integrated circuit of claim 1, wherein the first cross-sectional shape is substantially the same as the third cross-sectional shape.

3. The integrated circuit of claim 1, wherein the second cross-sectional shape is substantially the same as the fourth cross-sectional shape.

4. The integrated circuit of claim 1, wherein a distance between the second conductive line and a top surface of the substrate is different from a distance between the third conductive line and the top surface of the substrate.

5. The integrated circuit of claim 1, further comprising a shielding element, wherein the shielding element is positioned between the first conductive line and the substrate.

6. The integrated circuit of claim 1, further comprising a shielding element, wherein the shielding element comprises a plurality of substantially parallel shielding portions, a first shielding portion of the plurality of substantially parallel shielding portions located between the first conductive line and the second conductive line.

7. The integrated circuit of claim 1, further comprising a shielding element, wherein the shielding element comprises a plurality of substantially parallel shielding portions, a first shielding portion of the plurality of substantially parallel shielding portions located between the second conductive line and the third conductive line.

8. The integrated circuit of claim 1, further comprising a shielding element, wherein the shielding element comprises a plurality of substantially parallel shielding portions, a first shielding portion of the plurality of substantially parallel shielding portions located between the first conductive line and the second conductive line, and a second shielding portion of the plurality of substantially parallel shielding portions located between the second conductive line and the third conductive line.

9. The integrated circuit of claim 1, further comprising a shielding element, wherein the shielding element comprises a plurality of substantially parallel shielding portions, a first shielding portion of the plurality of substantially parallel shielding portions located on an opposite side of the third conductive line from the second conductive line.

10. An integrated circuit comprising:

a substrate having a surface; and

an inductor disposed over the surface of the substrate, the inductor configured to generate a magnetic field substantially parallel to the surface, wherein the inductor comprises;

a first L-shaped conductive line disposed over the surface, the first L-shaped conductive line having a first end and a second end;

a second L-shaped conductive line disposed over the surface, the second L-shaped conductive line having a first end and a second end;

a first conductive structure disposed over and electrically coupled with the first end of the first L-shaped conductive line;

a second conductive structure disposed over and electrically coupled with the first end of the second L-shaped conductive line; and

a third conductive line disposed over and electrically coupled with the first conductive structure and the second conductive structure.

11. The integrated circuit of claim 10, wherein a distance from a top surface of the substrate to the first L-shaped conductive line is substantially equal to a distance from the top surface of the substrate to the second L-shaped conductive line.

12. The integrated circuit of claim 10, wherein the inductor further comprises:

a third conductive structure disposed over and electrically coupled with the second end of the first L-shaped conductive line; and

a fourth conductive line disposed over and electrically coupled with the third conductive structure.

13. The integrated circuit of claim 12, further comprising a shielding element, wherein the shielding element comprises a plurality of substantially parallel shielding portions, a first shielding portion of the plurality of substantially parallel shielding portions located between the first L-shaped conductive line and the third conductive line, between the third conductive line and the second L-shaped conductive line, and between the first L-shaped conductive line and the fourth conductive line.

14. The integrated circuit of claim 12, wherein the inductor further comprises:

a fourth conductive structure disposed over and electrically coupled with a second end of the second L-shaped conductive line; and

a fifth conductive line disposed over and electrically coupled with the fourth conductive structure.

15. The integrated circuit of claim 12, further comprising a shielding element, wherein the shielding element comprises a plurality of substantially parallel shielding portions, a first shielding portion of the plurality of substantially parallel shielding portions located between the first L-shaped conductive line and the third conductive line, between the third conductive line and the second L-shaped conductive line, and between the second L-shaped conductive line and the fifth conductive line.

16. The integrated circuit of claim 10, further comprising a shielding element disposed between the first L-shaped conductive line and the substrate, and between the second L-shaped conductive line and the substrate.

17. The integrated circuit of claim 10, further comprising a shielding element, wherein the shielding element comprises a plurality of substantially parallel shielding portions, a first shielding portion of the plurality of substantially parallel shielding portions located between the first L-shaped conductive line and the third conductive line, and between the third conductive line and the second L-shaped conductive line.

18. An integrated circuit comprising:

a substrate having a surface; and

an inductor disposed over the surface of the substrate, the inductor configured to generate a magnetic field substantially parallel to the surface, wherein the inductor comprises;

a first L-shaped conductive line disposed over the surface, the first L-shaped conductive line having a first leg extending along a first axis and a second leg extending along a second axis perpendicular to the first axis from an intersection of the first leg and the second leg;

a second L-shaped conductive line disposed over the surface, the second L-shaped conductive line having a third leg extending along the first axis and a fourth leg extending along the second axis from an intersection of the third leg and the fourth leg, wherein a direction of the second leg is opposite to a direction of the fourth leg;

a first conductive structure disposed over and electrically coupled with the first L-shaped conductive line;

a second conductive structure disposed over and electrically coupled with the second L-shaped conductive line; and

a third conductive line disposed over and electrically coupled with the first conductive structure and the second conductive structure.

19. The integrated circuit of claim 18, wherein the first conductive structure is disposed over and electrically coupled with the second leg, and the second conductive structure is disposed over and electrically coupled with the fourth leg.

20. The integrated circuit of claim 18, further comprising a shielding element, wherein the shielding element comprises a plurality of substantially parallel shielding portions, a first shielding portion of the plurality of substantially parallel shielding portions located between the first L-shaped conductive line and the third conductive line, and between the third conductive line and the second L-shaped conductive line.