PACKING MULTIPLE SHADER PROGRAMS ONTO A GRAPHICS PROCESSOR
First Claim
Patent Images
1. A method comprising:
- causing a plurality of shader programs of a common shader program type to be loaded into an on-chip shader program instruction memory of a graphics processor such that each shader program in the plurality of shader programs resides in the on-chip shader program instruction memory at a common point in time.
1 Assignment
0 Petitions
Accused Products
Abstract
This disclosure describes techniques for packing multiple shader programs of a common shader program type onto a graphics processing unit (GPU). The techniques may include, for example, causing a plurality of shader programs of a common shader program type to be loaded into an on-chip shader program instruction memory of a graphics processor such that each shader program in the plurality of shader programs resides in the on-chip shader program instruction memory at a common point in time. In addition, various techniques for evicting shader programs from an on-chip shader program instruction memory are described.
-
Citations
42 Claims
-
1. A method comprising:
causing a plurality of shader programs of a common shader program type to be loaded into an on-chip shader program instruction memory of a graphics processor such that each shader program in the plurality of shader programs resides in the on-chip shader program instruction memory at a common point in time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
11. A device comprising:
a processor configured to cause a plurality of shader programs of a common shader program type to be loaded into an on-chip shader program instruction memory of a graphics processor such that each shader program in the plurality of shader programs resides in the on-chip shader program instruction memory at a common point in time. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
-
23. An apparatus comprising:
-
means for loading a shader program into an on-chip shader program instruction memory of a graphics processor; and means for causing a plurality of shader programs of a common shader program type to be loaded into the on-chip shader program instruction memory of the graphics processor such that each shader program in the plurality of shader programs resides in the on-chip shader program instruction memory at a common point in time. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32)
-
-
33. A computer-readable storage medium storing instructions that, when executed, cause one or more processors to:
cause a plurality of shader programs of a common shader program type to be loaded into an on-chip shader program instruction memory of a graphics processor such that each shader program in the plurality of shader programs resides in the on-chip shader program instruction memory at a common point in time. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40, 41, 42)
Specification