METHOD FOR BUILDING RULE OF THUMB OF DEFECT CLASSIFICATION, AND METHODS FOR CLASSIFYING DEFECT AND JUDGING KILLER DEFECT BASED ON RULE OF THUMB AND CRITICAL AREA ANALYSIS

• US 20130170733A1
• Filed: 12/28/2011
• Published: 07/04/2013
• Est. Priority Date: 12/28/2011
• Status: Active Grant

• Current Assignee: Elite Semiconductor Inc.
• Original Assignee: Elitech Technology Co., Ltd. (TYC Brother Industrial Company Limited)
• Inventors: LEU, IYUN
• Granted Patent: US 8,908,957 B2
• Time in Patent Office: Days
• US Class Current: 382/149
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10

Abstract

A method for building a rule of thumb of defect classification is illustrated. Multiple defect classification images with killer defects of examples and all material information of processes associated with the defect, the pattern, and the background are input into the fab tool. The fab tool obtains image characteristics, process characteristics, and image relativity characteristics of the defects, the pattern, and the background in each of the input images, wherein the input images comprises the defect classification images with killer defects of examples. The rule of thumb of the defect classification is built based on the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in each of the input images.

Claims

1. A method for building a rule of thumb of defect classification, applied in a fab tool, comprising:

inputting multiple defect classification images with killer defects of examples into the fab tool;

inputting all material information of processes associated with the defect, the pattern, and the background into the fab tool;

performing an image detection and analysis on each of input images, so as to create image characteristics of the defects, the pattern, and the background in each of the input images, wherein the input images comprises the defect classification images with killer defects of examples;

based on the image characteristics of the defects, the pattern, and the background in each of the input images, creating process characteristics and image relativity characteristics of the defects, the pattern, and the background in each of the input images; and

building the rule of thumb of the defect classification based on the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in each of the input images.

2. The method for building the rule of thumb of the defect classification according to claim 1, further comprising:

inputting multiple semiconductor images into the fab tool, wherein each semiconductor image has at least a defect, wherein the input images further comprises the semiconductor images.

3. The method for building the rule of thumb of the defect classification according to claim 2, wherein the semiconductor images are photographed by a scanning electron microscope (SEM), an optical microscope, or an e-beam microscope.

4. The method for building the rule of thumb of the defect classification according to claim 1, wherein the image recognition process comprises at least one of an edge detection, a noise filtering, a threshold analysis, a feature detection, an image scale detection, a contour cutting, a feature shape analysis, a contour generation, a pattern matching, a masking, a logic operation, a character recognition, a focus/defocus analysis, a light source detection, a color detection, and a texture analysis with the gray level co-occurrence matrix (GLCM).

5. The method for building the rule of thumb of the defect classification according to claim 1, wherein the process characteristics comprise at least one of a material source, a position, a brightness, a shape, a size, an edge, a shadow, the roughness, a hardness, and a direction.

6. The method for building the rule of thumb of the defect classification according to claim 5, wherein the material source of the defect is a pattern material, a background material, or a particle, and the material sources of the pattern and the background are of course respectively the pattern material and the background material.

7. The method for building the rule of thumb of the defect classification according to claim 1, the image relativity characteristics comprise a relative position, a relative brightness, a relative smoothness, a top view image, a side view image, a pattern edge visibility in the defect site, a occurrence preferred location, a divergence or convergence, and a previous pattern shape.

8. The method for building the rule of thumb of the defect classification according to claim 7, wherein the relative position of the defect to the pattern is upper, lower, or the same, the relative position of the defect to the background is upper, lower, or the same, and the relative position of the pattern to the background is upper, lower, or the same.

9. The method for building the rule of thumb of the defect classification according to claim 1, wherein the fab tool gives the different defects, the different patterns, and the different backgrounds with the different specific identification codes.

10. A method for classifying at least a defect based on a rule of thumb of defect classification, applied in the fab tool, wherein the rule of thumb of the defect classification is built by the method for building the rule of thumb of the defect classification according to claim 1, and the method for classifying at least a defect based on a rule of thumb of defect classification, comprising:

inputting a semiconductor image into the fab tool, wherein the semiconductor image has at least a defect;

inputting a defect scan data into the fab tool;

loading the rule of thumb of the defect classification;

performing an image detection and analysis on the input semiconductor image, so as to obtain the image characteristics of the defects, the pattern, and the background in the semiconductor image;

based on the image characteristics of the defects, the pattern, and the background in the semiconductor image, creating process characteristics and image relativity characteristics of the defects, the pattern, and the background in the semiconductor image; and

classifying the defects, the pattern, and the background of the semiconductor image based on the rule of thumb of the defect classification, so as to create the classification results of the defects of the semiconductor.

11. The method for classifying at least the defect based on the rule of thumb of the defect classification according to claim 10, further comprising:

exporting the classification results of the defects of the semiconductor to a fab tool user or to a storage device.

12. The method for classifying at least the defect based on the rule of thumb of the defect classification according to claim 10, wherein fab tool compares the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in the semiconductor to all of the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in the rule of thumb of the defect classification, so as to find the similar defects, the similar pattern, and the similar background in the rule of thumb of the defect classification, and thus the fab tool assigns the defects, the pattern, and the background in the semiconductor with the specific identification codes the same as those of the similar defects, the similar pattern, and the similar background in the rule of thumb of the defect classification.

13. A method for judging a killer defect based on a rule of thumb of defect classification and critical area analysis (CAA), applied in the fab tool, wherein the rule of thumb of the defect classification is built by the method for building the rule of thumb of the defect classification according to claim 1, and the method for judging a killer defect based on a rule of thumb of defect classification and CAA comprising:

steps of claim 10;

inputting typical defect type and the killer judgment knowledge into the fab tool;

based on the typical defect type and the killer judgment knowledge and the classification results of the defects, creating image pattern contours inside a defect area, image pattern contours outside the defect area, and a defect contour of the defects;

recovering the image pattern contours inside the defect area;

merging the recovered image pattern contours inside the defect area and the image pattern contours outside the defect area, so as to create image pattern contours of layout polygons;

performing CAA based on the defect contour of the defects and the merged image pattern contours, so as to create a CAA result; and

judging whether the killer defect exists in the semiconductor according to the CAA result.

14. The method for judging a killer defect based on a rule of thumb of defect classification and CAA according to claim 13, wherein fab tool removes the defect contour of the defects and the image pattern contours outside defect area, so as to extract the image pattern contours inside defect area, and the fab tool extends and connects each two of the disconnected ends in the image pattern contours inside defect area, so as to recover the image pattern contours inside defect area.

15. A method for judging a killer defect based on a rule of thumb of defect classification and CAA, applied in the fab tool, wherein the rule of thumb of the defect classification is built by the method for building the rule of thumb of the defect classification according to claim 1, and the method for judging a killer defect based on a rule of thumb of defect classification and CAA comprising:

steps of claim 10;

inputting a design layout pattern file into the fab tool;

creating defect and pattern contours of the semiconductor image;

performing a scale matching on the semiconductor image and the design layout pattern of design layout pattern file, so as to adjust a scale of the design layout pattern of design layout pattern file;

performing a pattern matching on the adjusted design layout pattern polygons and the semiconductor image, so as to locate correct defect coordinates of the defects; and

performing a critical area analysis on the defect contour of the defects and the scaled design layout pattern polygons, so as to judge whether the killer defect exists in the semiconductor.

16. The method for judging a killer defect based on a rule of thumb of defect classification and CAA according to claim 15, wherein fab tool removes the defect contour of the defects and the image pattern contours outside defect area, so as to extract the image pattern contours inside defect area, and the fab tool extends and connects each two of the disconnected ends in the image pattern contours inside defect area, so as to recover the image pattern contours inside defect area.