SYSTEMS AND METHODS FOR SOFTWARE INSTRUCTION TRANSLATION FROM A HIGH-LEVEL LANGUAGE TO A SPECIALIZED INSTRUCTION SET

• US 20130185703A1
• Filed: 01/17/2013
• Published: 07/18/2013
• Est. Priority Date: 01/17/2012
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: DAVIS, Alan L., HUNG, Ching-Yu, SANKARAN, Jadadeesh, NAGURNE, James, PHIPPS, Mel Alan, JAYARAJ, Ajay
• Granted Patent: US 9,092,228 B2
• Time in Patent Office: Days
• US Class Current: 717/140
• CPC Class Codes: G06F 8/41 Compilation
• CPC Class Codes: G06F 8/447 Target code generation

Abstract

A computer system includes a processor and program storage coupled to the processor. The program storage stores a software instruction translator that, when executed by the processor, is configured to receive source code and translate the source code to a low-level language. The source code is restricted to a subset of a high-level language and the low-level language is a specialized instruction set. Each statement of the subset of the high-level language directly maps to an instruction of the low-level language.

Claims

1. A computer system comprising:

a processor; and

program storage coupled to said processor;

wherein the program storage stores a software instruction translator that, when executed by the processor, is configured to receive source code, the source code restricted to a subset of a high-level language, and translate the source code to a low-level language;

wherein the low-level language comprises a specialized instruction set; and

wherein each statement of the subset of the high-level language directly maps to an instruction of the low-level language.

2. The computer system of claim 1 wherein the subset of the high-level language comprises a definition of a type that is not built into the standard high-level language, but that adheres to the semantics of the high-level language.

3. The computer system of claim 2 wherein the type corresponds to a vector data type on which the specialized instruction set operates.

4. The computer system of claim 2 wherein the definition of the type overloads an operator of the high-level language.

5. The computer system of claim 2 wherein the definition of the type corresponds to an addressing scheme of the specialized instruction set.

6. The computer system of claim 1 wherein the software instruction translator requires that the source code follow a nested-loop control structure.

7. The computer system of claim 1 wherein the software instruction translator is configured to generate an error message in response to an attempt to translate an otherwise-valid statement of the high-level language if the statement is outside of the subset.

8. A method comprising:

receiving source code that is restricted to a subset of a high-level language; and

translating the source code to a low-level language;

wherein the low-level language comprises a specialized instruction set; and

wherein each statement of the subset of the high-level language directly maps to an instruction of the low-level language.

9. The method of claim 8 wherein the subset of the high-level language comprises a definition of a type that is not built into the standard high-level language, but that adheres to the semantics of the high-level language.

10. The method of claim 9 wherein the type corresponds to a vector data type on which the specialized instruction set operates.

11. The method of claim 9 wherein the definition of the type overloads an operator of the high-level language.

12. The method of claim 8 wherein translating the source code requires that the source code follow a nested-loop control structure.

13. The method of claim 8 further comprising generating an error message in response to attempting to translate an otherwise-valid statement of the high-level language if the statement is outside of the subset.

14. The method of claim 8 further comprising executing the translated instructions in the low-level language on a specialized target processor.

15. A non-transitory computer-readable medium containing instructions that, when executed by a processor, cause the processor to:

receive source code that is restricted to a subset of a high-level language; and

translate the source code to a low-level language;

wherein the low-level language comprises a specialized instruction set; and

wherein each statement of the subset of the high-level language directly maps to an instruction of the low-level language.

16. The non-transitory computer-readable medium of claim 15 wherein the subset of the high-level language comprises a definition of a type that is not built into the standard high-level language, but that adheres to the semantics of the high-level language.

17. The non-transitory computer-readable medium of claim 16 wherein the type corresponds to a vector data type on which the specialized instruction set operates.

18. The non-transitory computer-readable medium of claim 15 wherein translating the source code requires that the source code follow a nested-loop control structure.

19. The non-transitory computer-readable medium of claim 15 wherein the instructions, when executed by the processor, cause the processor to generate an error message in response to an attempt to translate an otherwise-valid statement of the high-level language if the statement is outside of the subset.

20. The non-transitory computer-readable medium of claim 15 wherein the instructions, when executed by the processor, cause the processor to bad the translated instructions in the low-level language onto a specialized target processor for execution.