MATERIALS AND PROCESSES FOR RELEASING PRINTABLE COMPOUND SEMICONDUCTOR DEVICES

• US 20130196474A1
• Filed: 08/04/2011
• Published: 08/01/2013
• Est. Priority Date: 08/06/2010
• Status: Active Grant

• Current Assignee: X Display Company Technology Limited (Sensinnovat BVBA)
• Original Assignee: Semprius, Inc.
• Inventors: Meitl, Matthew, Bower, Christopher, Menard, Etienne, Carter, James, Gray, Allen, Bonafede, Salvatore
• Granted Patent: US 9,355,854 B2
• Time in Patent Office: Days
• US Class Current: 438/127
• CPC Class Codes: H01L 21/02395 Arsenides
• CPC Class Codes: H01L 21/02461 Phosphides
• CPC Class Codes: H01L 21/02546 Arsenides
• CPC Class Codes: H01L 21/02549 Antimonides
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 21/306 Chemical or electrical treatment, e.g. electrolytic etching to form insulating layers H01L21/31
• CPC Class Codes: H01L 21/30612 Etching of AIIIBV compounds
• CPC Class Codes: H01L 21/7813 leaving a reusable substrate, e.g. epitaxial lift off
• CPC Class Codes: H01L 23/053 the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
• CPC Class Codes: H01L 23/28 Encapsulations, e.g. encapsulating layers, coatings, e.g. for protectionH01L23/552 takes precedence; insulating layers for contacts or interconnections H01L23/5329
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 31/02168 the coatings being antireflective or having enhancing optical properties for the solar cells
• CPC Class Codes: H01L 31/048 Encapsulation of modules
• CPC Class Codes: H01L 31/184 the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
• CPC Class Codes: H01L 31/1844 comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
• CPC Class Codes: H01L 31/1892 methods involving the use of temporary, removable substrates
• CPC Class Codes: Y02E 10/544 Solar cells from Group III-V materials

Abstract

A method of fabricating transferable semiconductor devices includes providing a release layer including indium aluminum phosphide on a substrate, and providing a support layer on the release layer. The support layer and the substrate include respective materials, such as arsenide-based materials, such that the release layer has an etching selectivity relative to the support layer and the substrate. At least one device layer is provided on the support layer. The release layer is selectively etched without substantially etching the support layer and the substrate. Related structures and methods are also discussed.

Claims

1. A method of fabricating transferable semiconductor devices, the method comprising:

providing a release layer comprising indium aluminum phosphide on a substrate;

providing a support layer on the release layer, the support layer and the substrate comprising respective materials such that the release layer has an etching selectivity relative to the support layer and the substrate;

providing at least one device layer on the support layer; and

selectively etching the release layer without substantially etching the support layer and the substrate.

2. The method of claim 1, wherein the substrate and/or the support layer comprise an arsenide-based material, and wherein the release layer contacts and couples the support layer to the substrate.

3. The method of claim 2, wherein providing the release layer, the support layer, and the at least one device layer comprises:

epitaxially growing the release layer comprising indium aluminum phosphide on the substrate comprising the arsenide-based material;

epitaxially growing the support layer comprising the arsenide-based material on the release layer; and

epitaxially growing the at least one device layer on the support layer.

4. The method of claim 3, wherein the support layer is under compressive strain relative to the device layer, the release layer, and/or the substrate.

5. The method of claim 3, wherein a lattice mismatch between the release layer and the substrate is less than about 500 parts-per-million (ppm).

6. The method of claim 2, wherein the substrate and/or the support layer comprise a Group III arsenide material and/or a Group III-V arsenide material.

7. The method of claim 6, wherein the arsenide-based material comprises indium gallium arsenide, gallium arsenide, indium gallium nitride arsenide, and/or indium gallium nitride arsenide antimonide.

8. The method of claim 1, wherein selectively etching comprises:

selectively laterally etching the indium aluminum phosphide release layer using an etching solution comprising hydrochloric acid.

9. The method of claim 8, wherein the etching solution further comprises ethanol.

10. The method of claim 9, wherein the etching solution further comprises a compound configured to form a self-assembled monolayer on the substrate and/or the support layer.

11. The method of claim 8, wherein the release layer has a thickness of about 0.02 micrometers (μ

m) to about 1 μ

m, and wherein the selective etching is sufficient to etch the release layer at a rate of more than about 0.1 millimeters (mm) per hour.

12. The method of claim 1, wherein the at least one device layer laterally extends on the support layer by a distance that is at least about 100 times greater than a thickness of the at least one device layer.

13. The method of claim 1, further comprising:

partially or fully forming semiconductor devices on the at least one device layer and exposing a portion of the release layer by microfabrication techniques prior to selectively etching the release layer.

14. The method of claim 1, further comprising:

forming an encapsulation layer on the at least one device layer prior to selectively etching the release layer.

15. The method of claim 14, wherein the encapsulation layer comprises a photoresist material, and further comprising:

baking the photoresist material prior to selectively etching the release layer.

16. The method of claim 14, further comprising:

forming anchoring and/or tethering structures in the encapsulation layer, wherein the anchoring and/or tethering structures are configured to maintain spatial orientation of the semiconductor devices during and after the selective etching.

17. The method of claim 14, wherein the at least one device layer comprises an active layer of a photovoltaic cell, and further comprising the following prior to forming the encapsulation layer:

providing an indium aluminum phosphide window layer on the active layer; and

providing a dielectric anti-reflective coating on the window layer.

18. The method of claim 14, wherein the at least one device layer comprises indium aluminum phosphide and/or aluminum gallium arsenide.

19. The method of claim 1, wherein the support layer comprises a Group III arsenide-based lateral conduction layer having a sheet resistance of less than about 50 ohms per square.

20. The method of claim 1, wherein the at least one device layer comprises an active layer of a transferable photovoltaic cell, light emitting diode, radio frequency device, or wireless device.

21-38. -38. (canceled)

39. A process of releasing printable devices from a gallium arsenide substrate, comprising:

selectively laterally etching a release layer of indium aluminum phosphide in a mixture of hydrochloric acid and ethanol.

40. The process of claim 39, wherein the mixture further includes a compound that forms self-assembled monolayers on compound semiconductors.

41. A method of preparing a releasable printable device, comprising:

epitaxially growing on a gallium arsenide substrate an indium aluminum phosphide release layer, an arsenide-based layer adjacent to the release layer, and device layers, thereby forming an epi-stack;

partially or fully forming functional devices on the epi-stack and exposing some portion of the release layer by microfabrication techniques; and

selectively laterally etching the release layer in a mixture of hydrochloric acid and ethanol, thereby releasing the devices.

42. The method of claim 41, wherein the release layer has a thickness between about 20 nanometers and about 1 micron.

43. The method of claim 41, wherein the arsenide-based layer adjacent to the release layer comprises indium gallium arsenide, gallium arsenide, indium gallium nitride arsenide, and/or indium gallium nitride arsenide antimonide.

44. The method of claim 41, wherein the arsenide-based layer adjacent to the release layer is grown in compression relative to some part of the device, the release layer, and/or the substrate.

45. The method of claim 41, wherein the device layers form the active materials for photovoltaic cells, light-emitting diodes, lasers, radio-frequency or wireless devices.

46. The method of claim 41, wherein the device layers include indium aluminum phosphide and/or aluminum gallium arsenide.

47. The method of claim 41, wherein the microfabrication techniques further include the application and baking of photoresist to protect the partially or fully formed devices from chemical attack by the mixture of hydrochloric acid and ethanol.

48. The method of claim 41, wherein the microfabrication techniques further include forming anchoring and tethering structures to maintain spatial orientation of the printable devices through the release process.

49. The method of claim 47, wherein the microfabrication techniques further include forming anchoring and tethering structures in the photoresist.