CONFIGURATION FILE COMPATIBILITY

• US 20130198716A1
• Filed: 01/31/2012
• Published: 08/01/2013
• Est. Priority Date: 01/31/2012
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Inventors: Huang, Freeman Yufei, Anurag, Mehrotra, Anoop, Nair
• Granted Patent: US 9,170,827 B2
• Time in Patent Office: Days
• US Class Current: 717/121
• CPC Class Codes: G06F 8/36 Software reuse
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57
• CPC Class Codes: G06F 9/44505 Configuring for program initiating, e.g. using registry, configuration files

Abstract

Disclosed herein is a technique that compares a first series of bits associated with a configuration file with a second series of bits associated with computer readable instructions so as to determine whether the configuration file is compatible with the instructions

Claims

1. A system, the system comprising:

at least one processor;

instructions which, if executed, causes the at least one processor to;

compare a first series of bits associated with a configuration file with a second series of bits associated with the instructions so as to determine whether the configuration file is compatible with the instructions;

if it is determined that the first series of bits is different than the second series of bits, associate each active bit in the second series of bits, whose corresponding bit in the first series of bits is inactive, with a module which, if executed, causes the at least one processor to convert an entry in the configuration file so as to make the entry compatible with the instructions; and

execute each module associated with each active bit in the second series of bits whose corresponding bit in the first series of bits is inactive.

2. The system of claim 1, wherein each entry in the configuration file that is incompatible with the instructions is associated with each active bit in the second series of bits whose corresponding bit in the first series of bits is inactive.

3. The system of claim 1, wherein the module, if executed, further causes the at least one processor to replace the first series of bits with the second series of bits so as to associate the second series of bits with the configuration file.

4. The system of claim 1, wherein the first series of bits and the second series of bits are each associated with a value representing a number of bytes therein that contains at least one active bit.

5. The system of claim 1, wherein the first series of bits and the second series of bits each are each associated with a check sum for detecting errors therein.

6. The system of claim 1, wherein each entry of the configuration file comprises a variable arid a value associated with the variable.

7. The system of claim 6, wherein to convert the entry in the configuration file so as to make it compatible with the instructions, the module, if executed, causes the processor to alter the variable or the value included in the entry so as to enable the processor to read the entry in accordance with the instructions.

8. The system of claim 1, wherein each module is a subroutine contained in the instructions.

9. A non-transitory computer readable medium with instructions stored therein which, if executed, causes at least one processor to:

compare a first series of bits associated with a configuration file with a second series of bits associated with the instructions so as to determine whether the configuration file is compatible with the instructions;

if it is determined that the configuration file is not compatible with the instructions, associate each bit in the second series of bits, that is different than a corresponding bit in the first series of bits, with a module which, if executed, causes the at least one processor to convert an entry in the configuration file associated with a bit in the second series of bits, that is different than the corresponding bit in the first series of bits, so as to enable the at least one processor to detect the entry in the configuration file in accordance with the instructions; and

execute each module associated with each active bit in the second series of bits that is different than the corresponding bit in the first series of bits.

10. The computer readable medium of claim 9, wherein the module, if executed, further causes the at least one processor to replace the first series of bits with the second series of bits so as to associate the second series of bits with the configuration file.

11. The computer readable medium of claim 9, wherein the first series of bits and the second series of bits are each associated with a value representing a number of bytes therein that contains at least one active bit.

12. The computer readable medium of claim 9, wherein the first series of bits and the second series of bits are each associated with a check sum for detecting errors therein.

13. The computer readable medium of claim 9, wherein the module is a subroutine contained in the instructions.

14. A method comprising:

comparing, using at least one processor, a first series of bits associated with a configuration file with a second series of bits associated with a set of computer readable instructions so as to determine whether the configuration file is compatible with the instructions;

if it is determined that the configuration file is not compatible with the instructions, associating, using the at least one processor, each active bit in the second series of bits, whose corresponding bit in the first series of bits is inactive, with a module, the module converting an entry in the configuration file so as to ensure that the at least one processor is able to parse the entry in accordance with the instructions; and

execute each module associated with each active bit in the second series of bits whose corresponding bit in the first series of bits is inactive.

15. The method of claim 14, wherein the entry is associated with an active bit in the first series of bits whose corresponding bit in the first series of bits is inactive.

16. The method of claim 14, wherein the module, if executed, further causes the at least one processor to replace the first series of bits with the second series of bits so as to associate the second series of bits with the configuration file.

17. The method of claim 14, wherein the first series of bits and the second series of bits are each associated with a value representing a number of bytes therein that contains at least one active bit.

18. The method of claim 14, wherein the first series of bits and the second series of bits are each associated with a check sum for detecting errors therein.

19. The method of claim 14, wherein the module is a subroutine contained in the instructions.