RFID CHIP PACKAGE AND RFID TAG

• US 20130200162A1
• Filed: 03/11/2013
• Published: 08/08/2013
• Est. Priority Date: 01/14/2011
• Status: Active Grant

• Current Assignee: Murata Manufacturing Co Limited
• Original Assignee: Murata Manufacturing Co Limited
• Inventors: DOKAI, Yuya, SHIROKI, Koji
• Granted Patent: US 8,991,713 B2
• Time in Patent Office: Days
• US Class Current: 235/492
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/07786 the antenna being of the HF type, such as a dipole
• CPC Class Codes: H01Q 1/2225 used in active tags, i.e. provided with its own power source or in passive tags, i.e. deriving power from RF signal
• CPC Class Codes: H01Q 7/00 Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
• CPC Class Codes: H01Q 9/285 Planar dipole H01Q9/065 takes precedence; patch antenna H01Q9/0407

Abstract

An RFID chip package includes an RFID chip including a voltage booster circuit and processing an RF signal in a UHF band and a power supply circuit connected to the RFID chip and including at least one inductance element. A reactance component of an input/output impedance at an antenna-connecting input/output terminal of the power supply circuit is substantially 0Ω.

Claims

1. An RFID chip package comprising:

an RFID chip including a voltage booster circuit and processing an RF signal in a UHF band; and

a power supply circuit connected to the RFID chip and including at least one inductance element;

wherein

a reactance component of an input/output impedance at an antenna-connecting input/output terminal of the power supply circuit is substantially 0Ω

.

2. The RFID chip package according to claim 1, wherein

the RFID chip includes a balanced type input/output terminal including a first input/output terminal and a second input/output terminal;

the power supply circuit includes a first terminal connected to the first input/output terminal, a second terminal connected to the second input/output terminal, a third terminal connected to a first connection portion of an antenna element, and a fourth terminal connected to a second connection portion of the antenna element; and

the power supply circuit further includes a first inductance element connected between the first terminal and the second terminal and a second inductance element connected between the third terminal and the fourth terminal.

3. The RFID chip package according to claim 2, wherein an inductance value of the first inductance element is higher than an inductance value of the second inductance element.

4. The RFID chip package according to claim 2, wherein the first inductance element and the second inductance element are coupled to each other via an electromagnetic field.

5. The RFID chip package according to claim 2, wherein

the power supply circuit is located in a power supply circuit substrate including the inductance element;

and

the RFID chip is mounted on or included within the power supply circuit substrate.

6. The RFID chip package according to claim 5, wherein

the power supply circuit substrate is a laminate including a plurality of laminated base layers;

and

the inductance element includes a coil pattern in which a loop conductor provided on at least one of the base layers is wound.

7. The RFID chip package according to claim 6, wherein

the first inductance element and the inductance element are defined by a first coil pattern and a second coil pattern, respectively;

and

the first and second coil patterns are arranged adjacently in the laminate such that winding axes thereof are parallel or substantially parallel to each other.

8. The RFID chip package according to claim 7, wherein the first coil pattern and the second coil pattern are wound and arranged such that magnetic fields generated in the first and second coil patterns are in-phase with each other.

9. The RFID chip package according to claim 6, wherein

the power supply circuit further includes a capacitance element;

and

the capacitance element includes capacitance electrodes provided on the base layers so as to face each other.

10. An RFID tag including:

an antenna element including a connection portion; and

an RFID chip package connected to the connection portion;

wherein

the RFID chip package includes an RFID chip including a voltage booster circuit and processing an RF signal in a UHF band and a power supply circuit connected to the RFID chip and including at least one inductance element; and

a reactance component of an input/output impedance at an antenna-connecting input/output terminal of the power supply circuit is substantially 0Ω

.

11. The RFID tag according to claim 10, wherein

the RFID chip includes a balanced type input/output terminal including a first input/output terminal and a second input/output terminal;

the power supply circuit includes a first terminal connected to the first input/output terminal, a second terminal connected to the second input/output terminal, a third terminal connected to a first connection portion of an antenna element, and a fourth terminal connected to a second connection portion of the antenna element; and

the power supply circuit further includes a first inductance element connected between the first terminal and the second terminal and a second inductance element connected between the third terminal and the fourth terminal.

12. The RFID tag according to claim 11, wherein an inductance value of the first inductance element is higher than an inductance value of the second inductance element.

13. The RFID tag according to claim 11, wherein the first inductance element and the second inductance element are coupled to each other via an electromagnetic field.

14. The RFID tag according to claim 11, wherein

the power supply circuit is located in a power supply circuit substrate including the inductance element;

and

the RFID chip is mounted on or included within the power supply circuit substrate.

15. The RFID tag according to claim 14, wherein

the power supply circuit substrate is a laminate including a plurality of laminated base layers;

and

the inductance element includes a coil pattern in which a loop conductor provided on at least one of the base layers is wound.

16. The RFID tag according to claim 15, wherein

the first inductance element and the inductance element are defined by a first coil pattern and a second coil pattern, respectively;

and

the first and second coil patterns are arranged adjacently in the laminate such that winding axes thereof are parallel or substantially parallel to each other.

17. The RFID tag according to claim 16, wherein the first coil pattern and the second coil pattern are wound and arranged such that magnetic fields generated in the first and second coil patterns are in-phase with each other.

18. The RFID tag according to claim 15, wherein

the power supply circuit further includes a capacitance element;

and

the capacitance element includes capacitance electrodes provided on the base layers so as to face each other.