SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20130221345A1
• Filed: 02/25/2013
• Published: 08/29/2013
• Est. Priority Date: 02/28/2012
• Status: Abandoned Application

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ohno, Shinji, Kusumoto, Naoto, Watanabe, Hirokazu
• Application Number:
  US13/775,408
• Publication Number:
  US 20130221345A1
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/425 producing ion implantation
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A transistor excellent in electrical characteristics and a method for manufacturing the transistor are provided. The transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel formation region over an insulating surface; a gate insulating film over the oxide semiconductor layer; a gate electrode overlapping with the channel formation region, over the gate insulating film; a source electrode in contact with the source region; and a drain electrode in contact with the drain region. The source region and the drain region include a portion having higher oxygen concentration than the channel formation region.

Claims

1. A semiconductor device comprising:

an oxide semiconductor layer comprising a source region, a drain region, and a channel formation region over an insulating surface;

a gate insulating film over the oxide semiconductor layer;

a gate electrode over the gate insulating film, the gate electrode overlapping with the channel formation region;

a source electrode in contact with the source region; and

a drain electrode in contact with the drain region,

wherein the source region and the drain region comprise a portion having a higher oxygen concentration than the channel formation region.

2. The semiconductor device according to claim 1,

wherein the channel formation region comprises an oxide semiconductor comprising a c-axis aligned crystal, and

wherein the portion comprises an amorphous oxide semiconductor.

3. The semiconductor device according to claim 1,

wherein an impurity for improving conductivity of the oxide semiconductor layer is added to the portion.

4. The semiconductor device according to claim 1,

wherein at least one of the gate electrode, the source electrode, and the drain electrode is electrically connected to a semiconductor device comprising a semiconductor layer whose band gap is different from a band gap of the oxide semiconductor layer.

5. The semiconductor device according to claim 1, further comprising an insulating film over the gate insulating film and the gate electrode, wherein the insulating film comprises aluminum oxide.

6. The semiconductor device according to claim 1,

wherein a part of an end portion of the oxide semiconductor layer is covered with the source electrode and the drain electrode.

7. The semiconductor device according to claim 1,

wherein the oxide semiconductor layer comprises at least one of materials selected from the group consisting of indium, zinc, gallium, tin, hafnium, aluminum, and zirconium.

8. The semiconductor device according to claim 1,

wherein the oxide semiconductor layer comprises a first oxide semiconductor layer and a second oxide semiconductor layer which are stacked with each other.

9. The semiconductor device according to claim 8,

wherein the first oxide semiconductor layer is located over the second oxide semiconductor layer, and

wherein a concentration of gallium in the second oxide semiconductor layer is higher than that in the first oxide semiconductor layer.

10. A semiconductor device comprising:

a source electrode and a drain electrode over an insulating surface;

an oxide semiconductor layer comprising a source region, a drain region, and a channel formation region over the source electrode, the drain electrode, and the insulating surface;

a gate insulating film over the oxide semiconductor layer; and

a gate electrode over the gate insulating film, the gate electrode overlapping with the channel formation region,

wherein the source electrode is in contact with the source region and the channel formation region,

wherein the drain electrode is in contact with the drain region and the channel formation region, and

wherein the source region and the drain region comprise a portion having a higher oxygen concentration than the channel formation region.

11. The semiconductor device according to claim 10,

wherein the channel formation region comprises an oxide semiconductor comprising a c-axis aligned crystal, and

wherein the portion comprises an amorphous oxide semiconductor.

12. The semiconductor device according to claim 10,

wherein an impurity for improving conductivity of the oxide semiconductor layer is added to the portion.

13. The semiconductor device according to claim 10,

wherein at least one of the gate electrode, the source electrode, and the drain electrode is electrically connected to a semiconductor device comprising a semiconductor layer whose band gap is different from a band gap of the oxide semiconductor layer.

14. The semiconductor device according to claim 10, further comprising an insulating film over the gate insulating film and the gate electrode, wherein the insulating film comprises aluminum oxide.

15. The semiconductor device according to claim 10,

wherein the oxide semiconductor layer comprises at least one of materials selected from the group consisting of indium, zinc, gallium, tin, hafnium, aluminum, and zirconium.

16. The semiconductor device according to claim 10,

wherein the oxide semiconductor layer comprises a first oxide semiconductor layer and a second oxide semiconductor layer which are stacked with each other.

17. The semiconductor device according to claim 16,

wherein the first oxide semiconductor layer is located over the second oxide semiconductor layer, and

wherein a concentration of gallium in the second oxide semiconductor layer is higher than that in the first oxide semiconductor layer.

18. The semiconductor device according to claim 10,

wherein the gate electrode overlaps with the source electrode and the drain electrode.

19. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor layer over an insulating surface;

forming a gate insulating film over the oxide semiconductor layer;

forming a gate electrode over the gate insulating film so as to overlap with the oxide semiconductor layer; and

adding oxygen to a region which is in the oxide semiconductor layer and does not overlap with the gate electrode.