DIGITAL PHASE LOCKED LOOP
First Claim
1. An apparatus, comprising:
- digitally controlled oscillator circuitry;
feedback circuitry operatively coupled to the digitally controlled oscillator circuitry; and
comparison circuitry operatively coupled to the digitally controlled oscillator circuitry and the feedback circuitry;
wherein the digitally controlled oscillator circuitry is capable of generating a clock signal;
wherein the feedback circuitry, in response to the clock signal, is capable of generating a first digital value representing a detected phase of the clock signal for a given cycle of the clock signal;
wherein the comparison circuitry, in response to the first digital value and to a second digital value representing a reference phase, is capable of generating a phase error value which is useable to generate a first digital control word for controlling a frequency associated with the clock signal;
wherein the digitally controlled oscillator circuitry further comprises adjustment circuitry that is capable of, in response to a second digital control word, applying a phase adjustment to the clock signal.
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Accused Products
Abstract
An apparatus comprises digitally controlled oscillator circuitry, feedback circuitry operatively coupled to the digitally controlled oscillator circuitry, and comparison circuitry operatively coupled to the digitally controlled oscillator circuitry and the feedback circuitry. The feedback circuitry, in response to a clock signal generated by the digitally controlled oscillator circuitry, generates a first digital value representing a detected phase of the clock signal for a given clock signal cycle. The comparison circuitry, in response to the first digital value and to a second digital value representing a reference phase, generates a phase error value. The phase error value is useable to generate a first digital control word provided to the digitally controlled oscillator circuitry for controlling a frequency associated with the clock signal. The digitally controlled oscillator circuitry further comprises adjustment circuitry capable of applying a phase adjustment to the clock signal in response to a second digital control word.
38 Citations
22 Claims
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1. An apparatus, comprising:
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digitally controlled oscillator circuitry; feedback circuitry operatively coupled to the digitally controlled oscillator circuitry; and comparison circuitry operatively coupled to the digitally controlled oscillator circuitry and the feedback circuitry; wherein the digitally controlled oscillator circuitry is capable of generating a clock signal; wherein the feedback circuitry, in response to the clock signal, is capable of generating a first digital value representing a detected phase of the clock signal for a given cycle of the clock signal; wherein the comparison circuitry, in response to the first digital value and to a second digital value representing a reference phase, is capable of generating a phase error value which is useable to generate a first digital control word for controlling a frequency associated with the clock signal; wherein the digitally controlled oscillator circuitry further comprises adjustment circuitry that is capable of, in response to a second digital control word, applying a phase adjustment to the clock signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A method, comprising:
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generating a clock signal via digitally controlled oscillator circuitry; generating a first digital value via feedback circuitry coupled to the digitally controlled oscillator circuitry, in response to the clock signal, the first digital value representing a detected phase of the clock signal for a given cycle of the clock signal; generating a phase error value via comparison circuitry coupled to the feedback circuitry in response to the first digital value and to a second digital value representing a reference phase, wherein the phase error value is useable to generate a first digital control word for controlling a frequency associated with the clock signal; and applying a phase adjustment to the clock signal in response to a second digital control word.
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Specification