Multi-Stage Power Adapter

• US 20130232349A1
• Filed: 10/12/2012
• Published: 09/05/2013
• Est. Priority Date: 03/02/2012
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Umeno, Hiroo, Oler, Van Winston
• Granted Patent: US 8,850,241 B2
• Time in Patent Office: Days
• US Class Current: 713/300
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/263 Arrangements for using multiple switchable power supplies, e.g. battery and AC G06F1/30 takes precedence

Abstract

Multi-stage power adapter techniques are described in which a power adapter for a device is configured to selectively switch between a relatively low power supply and a relatively high power supply. The low power supply may be employed upon initial connection of the adapter to a host device to ensure that the adapter is safe when disconnected and does not supply full power before the device is ready to receive the high power supply. The low power supply may supply enough power for the host device to detect the connection of the adapter and establish initial communication with the adapter. A switch to the high power supply by the adapter may then occur in response to a notification from the host device that indicates the host device is ready for the high power supply. The switch to high power supply enables normal operation of the host device.

Claims

1. A method implemented by a power adapter comprising:

supplying low power by the power adapter in a low power mode upon initial connection of the power adapter to a host computing device to power a microcontroller for performance of power management tasks without supplying power to a primary processing system of the host computing device;

detecting a notification from the host computing device configured to indicate to the power adapter that the host computing device is ready for high power; and

supplying by the power adapter high power in a high power mode to the host computing device in response to detection of the notification.

2. A method as described in claim 1, wherein the notification is a patterned signal generated by a power controller of the host computing device.

3. A method as described in claim 2, wherein the patterned signal comprises a repeating pattern of voltage pulses.

4. A method as described in claim 1, wherein supplying high power comprises causing the power adapter to switch from the low power mode to the high power mode by decreasing an amount of resistance applied in power supply circuitry of the power adapter.

5. A method as described in claim 1, wherein the power adapter is configured to output substantially constant voltage and vary an amount of current output to implement multiple power modes including the low power mode and the high power mode.

6. A method as described in claim 1, wherein the low power supplied by the power adapter is sufficient to operate a microcontroller of the host computing device configured to generate and communicate the notification responsive to a determination that the host computing device is ready for high power.

7. A method as described in claim 1, further comprising recognizing an initial connection of the power adapter to a power source and causing the power adapter to operate in the low power mode until the notification from the host computing device is detected.

8. A method as described in claim 1, wherein:

the power adapter incorporates a five pin connector connectable to an adapter interface of the host computing device; and

one of the five pins is configured to form a communicative coupling to the host computing device when connected to the adapter interface that is employed to convey the notification from the host computing device to the power adapter.

9. A method implemented by a host computing device comprising:

obtaining a low power supply from a power adapter in a low power supply mode, the low power supply sufficient to operate a power controller of the host computing device to perform power management tasks without supplying power to a primary processing system of the host computing device;

detecting connection of the power adapter to an adapter interface of the host computing device;

determining whether the host computing device is ready for high power from the power adapter;

responsive to determining that the host computing device is ready for high power from the power adapter;

generating a notification for communication to the power adapter to cause the power adapter to switch to a high power supply mode; and

obtaining a high power supply from the power adapter in the high power mode in response to communication of the notification.

10. A method as described in claim 9, wherein the detecting and generating are performed by a power controller of the host computing device that operates independently of a primary processing system of the host computing device.

12. A method as described in claim 9, wherein the notification comprises an alphanumeric code.

13. A method as described in claim 9, wherein the notification comprises a non-random signal pattern.

14. A method as described in claim 9, further comprising communicating the notification to the power adapter via a single pin communication channel established by the connection of the power adapter to the adapter interface.

15. A method as described in claim 9, wherein determining whether the host computing device is ready for high power from the power adapter comprises ascertaining whether a connector of the power adapter is attached properly to the adapter interface of the host computing device

16. A method as described in claim 9, wherein determining whether the host computing device is ready for high power from the power adapter comprises verifying whether power output supplied by the power adapter is compatible with the host computing device.

17. A method as described in claim 9, wherein determining whether the host computing device is ready for high power from the power adapter comprising obtaining identifying data from the power adapter to identify a type of adapter associated with the power adapter.

11. (canceled)

18. A power adapter for a host computing device comprising:

power supply circuitry of the power adapter configured to provide a low power supply in a low power mode and a high power supply in a high power mode to the host computing device, the lower power supply being sufficient to operate a power controller of the host computing device to perform power management tasks without booting the host computing device; and

a power manager module operable to selectively switch between supplying power to the host computing device in the low power mode and the high power mode based upon feedback obtained from the host device.

19. A power adapter as described in claim 18, wherein the power manager module is configured to cause an amount of resistance applied in the power supply circuitry to change to selectively switch between the low power mode and the high power mode, such that different current levels are output in the low power mode and the high power mode.

20. A power adapter as described in claim 18, wherein the feedback comprises a pulsed voltage signal that is received by the power manager module from a power controller of the host computing device, the pulsed voltage signal being communicated by the power controller responsive to a determination that the host computing device is ready for the high power supply and configured to cause the power manager module to switch to the high power mode.

21. A power adapter as described in claim 18, further comprising a microcontroller hardware device configured to implement the power manager module integrated with the power adapter.