NON-VOLATILE MEMORY DEVICE AND PRODUCTION METHOD THEREOF

• US 20130234101A1
• Filed: 11/22/2010
• Published: 09/12/2013
• Est. Priority Date: 11/22/2010
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Sasago, Yoshitaka, Kinoshita, Masaharu, Morikawa, Takahiro, Shima, Akio, Kobayashi, Takashi
• Granted Patent: US 8,866,123 B2
• Time in Patent Office: Days
• US Class Current: 257/4
• CPC Class Codes: H01L 29/66833 with a charge trapping gate insulator, e.g. MNOS transistors
• CPC Class Codes: H01L 29/7926 Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels
• CPC Class Codes: H10B 43/35 with cell select transistors, e.g. NAND
• CPC Class Codes: H10B 63/10 Phase change RAM [PCRAM, PRAM] devices
• CPC Class Codes: H10B 63/20 comprising selection components having two electrodes, e.g. diodes
• CPC Class Codes: H10B 63/30 comprising selection components having three or more electrodes, e.g. transistors
• CPC Class Codes: H10B 63/34 of the vertical channel field-effect transistor type
• CPC Class Codes: H10B 63/84 arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
• CPC Class Codes: H10B 63/845 the switching components being connected to a common vertical conductor
• CPC Class Codes: H10N 70/021 Formation of switching materials, e.g. deposition of layers
• CPC Class Codes: H10N 70/023 by chemical vapor deposition, e.g. MOCVD, ALD
• CPC Class Codes: H10N 70/066 by filling of openings, e.g. damascene method
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/823 adapted for essentially horizontal current flow, e.g. bridge type devices
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8265 on sidewalls of dielectric structures, e.g. mesa-shaped or cup-shaped devices
• CPC Class Codes: H10N 70/8828 Tellurides, e.g. GeSbTe

Abstract

A vertical chain memory includes two-layer select transistors having first select transistors which are vertical transistors arranged in a matrix, and second select transistors which are vertical transistors formed on the respective first select transistors, and a plurality of memory cells connected in series on the two-layer select transistors. With this configuration, the adjacent select transistors are prevented from being selected by respective shared gates, the plurality of two-layer select transistors can be selected, independently, and a storage capacity of a non-volatile storage device is prevented from being reduced.

Claims

1. A non-volatile storage device, comprising:

a first conductive layer formed on a semiconductor substrate;

a first semiconductor layer formed on the first conductive layer;

a first line formed on a sidewall of the first semiconductor layer through a first insulator film, and extended in a first direction along a main surface of the semiconductor substrate;

a second semiconductor layer formed on the first semiconductor layer;

a second line formed on a sidewall of the second semiconductor layer through a second insulator film, and extended in the first direction;

a plurality of stacked films having a plurality of third insulator films and a plurality of third lines alternately stacked together, aligned in a second direction orthogonal to the first direction, and extended in the first direction;

a first memory material layer and a third semiconductor layer stacked on one of facing sidewalls of the plurality of adjacent stacked films, and a second memory material layer and a fourth semiconductor layer stacked on the other of the facing sidewalls of the plurality of stacked films; and

a plurality of second conductive layers formed on the stacked films and extended in the second direction,

wherein the first conductive layer and the second conductive layers are connected in series through the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer, and

wherein the first conductive layer and the second conductive layers are connected in series through the first semiconductor layer, the second semiconductor layer, and the fourth semiconductor layer.

2. The non-volatile storage device according to claim 1,

wherein the third semiconductor layer and the fourth semiconductor layer are connected in parallel to each other between the second semiconductor layer and the second conductive layers, or connected in parallel to each other between the first semiconductor layer and the first conductive layer.

3. The non-volatile storage device according to claim 1,

wherein the first line and the second line are each aligned in plural number in the second direction,

wherein the first semiconductor layer is formed on both sidewalls of the first line in the second direction through the first insulator film,

wherein the second semiconductor layer is formed on both sidewalls of the second line in the second direction through the second insulator film, and

wherein the second line is formed immediately above a region between the adjacent first lines.

4. The non-volatile storage device according to claim 1,

wherein the first line and the first semiconductor layer are alternately arranged in plural number through the first insulator film therebetween in the second direction,

wherein the second line and the second semiconductor layer are alternately arranged in plural number through the second insulator film therebetween in the second direction,

wherein the second line is arranged immediately above the first line,

wherein the first semiconductor layer on one sidewall of the first line in the second direction is higher in impurity concentration than the second semiconductor layer formed immediately thereabove and the first semiconductor layer on the other sidewall of the first line in the second direction, and

wherein the second semiconductor layer on one sidewall of the second line in the second direction is higher in impurity concentration than the first semiconductor layer formed immediately therebelow and the second semiconductor layer on the other sidewall of the second line in the second direction.

5. The non-volatile storage device according to claim 1,

wherein the first line and the second line are aligned in the second direction in plural number,

wherein the second line is arranged immediately above the first line,

wherein the first semiconductor layer is formed on both sidewalls of the first line in the second direction through the first insulator film,

wherein the second semiconductor layer is formed on both the sidewalls of the second line in the second direction through the second insulator film,

wherein two of the first semiconductor layers are formed between the adjacent first lines,

wherein two of the second semiconductor layers are formed between the adjacent second lines,

wherein the first semiconductor layer on one sidewall of the first line in the second direction is higher in impurity concentration than the second semiconductor layer formed immediately thereabove and the first semiconductor layer on the other sidewall of the first line in the second direction, and

wherein the second semiconductor layer on one sidewall of the second line in the second direction is higher in impurity concentration than the first semiconductor layer formed immediately therebelow and the second semiconductor layer on the other sidewall of the second line in the second direction.

6. The non-volatile storage device according to claim 1,

wherein the first memory material layer and the second memory material, layer each include a phase change material, a fourth insulator film and the first memory material layer are formed on one sidewall of each of the plurality of stacked films in order from the plurality of stacked films side, and a fifth insulator film, the fourth semiconductor layer, and the second memory material layer are formed on the other sidewall in order from the plurality of stacked films side.

7. The non-volatile storage device according to claim 1,

wherein the first memory material layer and the second memory material layer each include a first voltage barrier film, a charge storage film, and a second voltage barrier film stacked in order from the sidewall side of the plurality of stacked films, and

wherein the third semiconductor layer is formed on one sidewall of each of the plurality of stacked films through the first memory material layer, and the fourth semiconductor layer is formed on the other sidewall through the second memory material layer.

8. The non-volatile storage device according to claim 6,

wherein five semiconductor layers are formed among the third semiconductor layer, the fourth semiconductor layer, and the plurality of second conductive layers, and

wherein a fourth line extended in the first direction is formed through a sixth insulator film on a sidewall of each of the fifth semiconductor layer in the second direction.

9. A non-volatile storage device, comprising:

a first conductive layer formed on a semiconductor substrate along a main surface of the semiconductor substrate;

a first semiconductor layer formed on the first conductive layer;

a first line formed on a sidewall of the first semiconductor layer through a first insulator film, and extended in a first direction along the main surface of the semiconductor substrate;

a second semiconductor layer formed on the first semiconductor layer;

a second line formed on a sidewall of the second semiconductor layer through a second insulator film, and extended in the first direction;

a plurality of stacked films having a plurality of stacked films having a plurality of third insulator films and a plurality of first conductivity type semiconductor layers alternately stacked on the second semiconductor layer together, aligned in a second direction orthogonal to the first direction, and extended in the first direction;

a first phase change material layer formed on one of facing sidewalls of the plurality of adjacent stacked films, and a second phase change material layer formed on the other of the facing sidewalls of the plurality of stacked films;

a second conductive layer formed to be embedded in the plurality of adjacent stacked films; and

a plurality of second conductivity type semiconductor layers each formed between the plurality of first conductivity type semiconductor layers and the first phase change material layer, and between the plurality of first conductivity type semiconductor layers and the second phase change material layer,

wherein the first conductive layer and the plurality of first conductivity type semiconductor layers are electrically connected to the first semiconductor layer, the second semiconductor layer, the second conductive layer, and the plurality of second conductivity type semiconductor layers through any one of the first phase change material layer and the second phase change material layer.

10. The non-volatile storage device according to claim 9,

wherein the first line and the second line are each aligned in plural number in the second direction,

wherein the first semiconductor layer is formed on both sidewalls of the first line in the second direction through the first insulator film,

wherein the second semiconductor layer is formed on both sidewalls of the second line in the second direction through the second insulator film, and

wherein the second line is formed immediately above a region between the adjacent first lines.

11. The non-volatile storage device according to claim 9,

wherein the first line and the first semiconductor layer are alternately arranged in plural number through the first insulator film therebetween in the second direction,

wherein the second line and the second semiconductor layer are alternately arranged in plural number through the second insulator film therebetween in the second direction,

wherein the second line is arranged immediately above the first line,

wherein the first semiconductor layer on one sidewall of the first line in the second direction is higher in impurity concentration than the second semiconductor layer formed immediately thereabove and the first semiconductor layer on the other sidewall of the first line in the second direction, and

wherein the second semiconductor layer on one sidewall of the second line in the second direction is higher in impurity concentration than the first semiconductor layer formed immediately therebelow and the second semiconductor layer on the other sidewall of the second line in the second direction.

12. The non-volatile storage device according to claim 9,

wherein the first line and the second line are aligned in the second direction in plural number,

wherein the second line is arranged immediately above the first line,

wherein the first semiconductor layer is formed on both sidewalls of the first line in the second direction through the first insulator film,

wherein the second semiconductor layer is formed on both the sidewalls of the second line in the second direction through the second insulator film,

wherein two of the first semiconductor layers are formed between the adjacent first lines,

wherein two of the second semiconductor layers are formed between the adjacent second lines,

wherein the first semiconductor layer on one sidewall of the first line in the second direction is higher in impurity concentration than the second semiconductor layer formed immediately thereabove and the first semiconductor layer on the other sidewall of the first line in the second direction, and

wherein the second semiconductor layer on one sidewall of the second line in the second direction is higher in impurity concentration than the first semiconductor layer formed immediately therebelow and the second semiconductor layer on the other sidewall of the second line in the second direction.

13. A method of producing a non-volatile storage device, comprising the steps of:

(a) forming, on the first conductive layer formed on a semiconductor substrate, a first select transistor including a first channel layer electrically connected to the first conductive layer, and a first gate line formed on a sidewall of the first channel layer through a first insulator film, and extended in a first direction along a main surface of the semiconductor substrate;

(b) forming, on the first channel layer, a second select transistor including a second channel layer electrically connected to the first channel layer, and a second gate line formed on a sidewall of the second channel layer through a second insulator film, and extended in the first direction;

(c) forming a first stacked film on the second select transistor by alternately stacking (N+1) (N is an integer of N≧

1) third insulator films and the N first semiconductor layers;

(d) forming a plurality of first patterns aligned in a second direction orthogonal to the first direction and extended in the first direction by processing the first stacked film;

(e) forming a third channel layer and a memory material layer which are electrically connected to the second channel layer through a fourth insulting film on the respective sidewalls of the plurality of first patterns;

(f) exposing an upper surface of the third channel layer after a fifth insulator film is embedded between the plurality of adjacent first patterns; and

(g) after the (f) step, forming, on the third channel layer, a plurality of lines electrically connected to the third channel layer, aligned in the first direction, and extending in the second direction, and then removing the third channel layer immediately below a region between the plurality of adjacent lines.

14. The method of producing a non-volatile storage device according to claim 13,

wherein, in the step (a), the first channel layer is formed on both sidewalls of the first gate line in the second direction;

and

in the step (b), the second gate line is formed immediately above a region between the adjacent first gate lines, and the second channel layer is formed on both sidewalls of the second gate line in the second direction.

15. The method of producing a non-volatile storage device according to claim 13,

wherein the step (a) comprises the steps of:

(a1) forming the first channel layer on both sidewalls of the first gate line in the second direction; and

(a2) introducing impurities into the first channel layer on one sidewall of the first gate line by using the oblique ion implantation technique, and

wherein the step (b) comprises the steps of;

(b1) forming the second channel layer on both sidewalls of the second gate line in the second direction; and

(b2) introducing the impurities into the second channel layer adjacent to the second channel layer formed immediately above the first channel layer into which the impurities are introduced in the step (a2) by using the oblique ion implantation technique.

16. The method of producing a non-volatile storage device according to claim 13,

wherein the step (a) comprises the steps of:

(a3) forming the first gate lines and the first channel layers alternately aligned in the second direction in plural number; and

(a4) after covering an upper surface of the first channel layer formed on one sidewall of the first gate line in the second direction with a first mask, introducing impurities in the other first channel layer, and then removing the first mask,

wherein the step (b) comprises the steps of;

(b3) alternately forming the second gate lines and the second channel layers in the second direction in plural number; and

(b4) after covering an upper surface of the second channel layer formed immediately above the first channel layer into which the impurities are introduced in the step (a4) with a second mask, introducing impurities into the second channel layer not covered with the second mask, and then removing the second mask.

17. The method of producing a non-volatile storage device according to claim 13, wherein the memory material layer includes a phase change material.

18. The method of producing a non-volatile storage device according to claim 13,

wherein the step (a) comprises the steps of:

(a5) forming a plurality of second patterns extended in the first direction, including the first gate line on the first conductive layer, to be aligned in the second direction; and

(a6) after forming the second insulator film on the semiconductor substrate so as not be completely embedded in regions between the plurality of adjacent third patterns in the second direction, forming a fifth channel layer on the respective sidewalls of the plurality of third patterns through the second insulator film; and

(b7) removing the second insulator film exposed from the fifth channel layer to expose an upper surface of the first channel layer.

19. The method of producing a non-volatile storage device according to claim 13,

(c1) after the step (b) and before the step (c), further comprising the step of intermittently aligning a plurality of the first channel layers and a plurality of the second channel layers in the first direction.

20. The method of producing anon-volatile storage device according to claim 13,

(g1) after the step (g), further comprising the step of removing the first channel layer and the second channel layer immediately below the regions between the plurality of adjacent lines to intermittently forming the first channel layers and the second channel layers in the first direction in plural number.