Power Amplification System Using Doherty Amplifier with Linearization Circuit and Related Techniques

• US 20130241656A1
• Filed: 03/07/2013
• Published: 09/19/2013
• Est. Priority Date: 03/19/2012
• Status: Abandoned Application

• Current Assignee: Auriga Measurement Systems
• Original Assignee: Auriga Measurement Systems
• Inventors: Tajima, Yusuke, Liss, Cheryl V., Muir, John, Shen-Schultz, Qin
• Application Number:
  US13/788,824
• Publication Number:
  US 20130241656A1
• Time in Patent Office: Days
• US Class Current: 330/295
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 2201/3221 Predistortion by overamplifying in a feedforward stage the distortion signal to have a combined main signal and "negative" distortion to form the predistorted signal for a further stage. so that after amplification in the further stage only the amplified main signal remains
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602
• CPC Class Codes: H03G 3/00 Gain control in amplifiers or frequency changers

Abstract

A power amplification system includes a linearizer circuit feeding a power amplifier to linearize the operation of the power amplifier. The linearizer circuit may shape the input signal of the power amplifier in a manner that complements the output power versus input power characteristic of the power amplifier. In some embodiments, the linearizer may increase the relative magnitude of higher power portions of the input signal while decreasing the relative magnitude of lower power portions of the input signal to provide an overall increase in the linearity of the power amplification system. The power amplifier may include a Doherty amplifier in some implementations.

Claims

1. A power amplification system comprising:

a Doherty power amplifier having an input port and an output port, the Doherty power amplifier to amplify an input signal received at the input port to generate an amplified signal at the output port, the Doherty power amplifier including a carrier amplifier and a peaking amplifier coupled in a parallel arrangement, wherein both the carrier amplifier and the peaking amplifier contribute to RF signal amplification during peak portions of the input signal and only the carrier amplifier contributes to RF signal amplification during non-peak portions of the input signal; and

a linearizer circuit coupled to the input port of the Doherty power amplifier to shape the input signal before it reaches the Doherty power amplifier, the linearizer circuit to increase the relative magnitude of higher power portions of the input signal and to decrease the relative magnitude of lower power portions of the input signal so that the power amplification system operates in a more linear manner than the Doherty power amplifier alone.

2. The power amplification system of claim 1, further comprising:

a preamplifier coupled to the linearizer circuit to compensate for losses in the linearizer circuit.

3. The power amplification system of claim 2, wherein:

the preamplifier has an output that is operatively coupled to an input of the linearizer circuit.

4. The power amplification system of claim 2, wherein:

the preamplifier is located between the linearizer circuit and the Doherty power amplifier.

5. The power amplification system of claim 1, wherein:

the power amplification system is configured for use with modulation schemes having a high peak to average power ratio (PAPR).

6. The power amplification system of claim 1, wherein:

the power amplification system operates with a power added efficiency (PAE) of 30 percent or better when 64-QAM signals are being amplified.

7. The power amplification system of claim 1, wherein the Doherty power amplifier further comprises:

a divider circuit to divide the input signal into first and second signal components for delivery to the carrier amplifier and the peaking amplifier, respectively; and

a combiner circuit to combine output signals of the carrier amplifier and the peaking amplifier.

8. The power amplification system of claim 1, wherein:

the carrier amplifier is configured as a class B or class AB power amplifier and the peaking amplifier is configured as a class C power amplifier.

9. A power amplification system comprising:

a Doherty power amplifier having an input port and an output port, the Doherty power amplifier to amplify an input signal received at the input port to generate an amplified signal at the output port, the Doherty power amplifier including a carrier amplifier and a peaking amplifier coupled in a parallel arrangement, wherein both the carrier amplifier and the peaking amplifier contribute to RF signal amplification during peak portions of the input signal and only the carrier amplifier contributes to RF signal amplification during non-peak portions of the input signal; and

a linearizer circuit to shape the input signal before it reaches the Doherty power amplifier, the linearizer circuit comprising;

a linearizer input port to receive an unshaped input signal;

a linearizer output port to output a shaped input signal for delivery to the input port of the Doherty amplifier;

a divider circuit coupled to the linearizer input port to divide the unshaped input signal into a first signal component and a second signal component;

a first radio frequency (RF) signal path to process the first signal component, the first RF signal path comprising a passive delay line having a predetermined length;

a second RF signal path to process the second signal component, the second RF signal path comprising an odd number of transistor amplifier stages; and

a combiner circuit to combine output signals of the first and second RF signal paths to generate a combined signal at an output port of the combiner circuit, wherein the output port of the combiner circuit is coupled to the linearizer output port.

10. The power amplification system of claim 9, wherein:

an insertion phase of the first RF signal path is approximately 180 degrees different from an insertion phase of the second RF signal path within a frequency band of interest.

11. The power amplification system of claim 9, wherein:

the output signals of the first and second RF signal paths at least partially cancel each other within the combiner circuit.

12. The power amplification system of claim 9, wherein:

the first signal component and the second signal component output by the divider circuit are substantially in phase with one another.

13. The power amplification system of claim 9, wherein:

the first signal component and the second signal component output by the divider circuit are out of phase with one another by M degrees, wherein the combiner circuit is adapted to compensate for the M degree phase difference generated by the divider so that the output signals of the first and second RF signal paths are substantially 180 degrees out of phase when combined.

14. The power amplification system of claim 9, wherein:

the first RF signal path includes one or more adjustable phase shifters to adjust an insertion phase of the first RF signal path.

15. The power amplification system of claim 9, wherein:

the second RF signal path includes one or more adjustable phase shifters to adjust an insertion phase of the second RF signal path.

16. The power amplification system of claim 9, wherein:

the second RF signal path includes one or more adjustable attenuators to adjust a signal level within the second RF signal path.

17. The power amplification system of claim 9, further comprising:

a preamplifier coupled to the linearizer circuit to compensate for losses in the linearizer circuit.

18. The power amplification system of claim 9, further comprising:

a digital processor to adjust one or more controllable elements within the linearizer circuit based, at least in part, on an indication of non-linear content within an output signal of the Doherty amplifier.

19. The power amplification system of claim 18, wherein:

the digital processor is configured to adjust at least one of;

one or more adjustable phase shifters within the first RF signal path, one or more adjustable phase shifters within the second RF signal path, one or more adjustable attenuators within the second RF signal path, or one or more amplifier bias levels associated with the transistor amplifier stages of the second RF signal path.