SEMICONDUCTOR DEVICE

• US 20130256819A1
• Filed: 01/28/2013
• Published: 10/03/2013
• Est. Priority Date: 03/28/2012
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: WATANABE, Takahito, Yamamichi, Shinataro
• Granted Patent: US 9,172,028 B2
• Time in Patent Office: Days
• US Class Current: 257/422
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/06155 Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/37099 Material
• CPC Class Codes: H01L 2224/37155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/3716 Iron [Fe] as principal constituent
• CPC Class Codes: H01L 2224/40095 Kinked
• CPC Class Codes: H01L 2224/40225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4824 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4826 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2224/49171 : Fan-out arrangements
• CPC Class Codes: H01L 2224/49175 : Parallel arrangements
• CPC Class Codes: H01L 2224/73203 : Bump and layer connectors
• CPC Class Codes: H01L 2224/73221 : Strap and wire connectors
• CPC Class Codes: H01L 2224/73253 : Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2224/8385 : using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2224/8485 : using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2224/85 : using a wire connector
• CPC Class Codes: H01L 2224/8592 : Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/295 : containing a filler H01L23/296 takes precedence
• CPC Class Codes: H01L 23/552 : Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/06 : of a plurality of bonding areas
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/34 : Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/36 : Structure, shape, material or disposition of the strap connectors prior to the connecting process
• CPC Class Codes: H01L 24/40 : of an individual strap connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/1431 : Logic devices
• CPC Class Codes: H01L 2924/1434 : Memory
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H10N 50/80 : Constructional details

Abstract

A yield of semiconductor devices having a magnetic shield is enhanced. A magnetic shield member SIE has a first shield member SIE1 and a second shield member SIE2. The first shield member SIE1 has a first facing region FP1 facing a first surface of a semiconductor chip SC. The second shield member SIE2 has a second facing region FP2 facing a second surface of the semiconductor chip SC. A resin layer RL1 has a portion thereof making contact with the first shield member SIE1, and has another portion thereof making contact with the second shield member SIE2. Then, the first shield member SIE1 and the second shield member SIE2 are magnetically coupled via the resin layer RL1 or directly. The first shield member SIE1 and the second shield member SIE2 cover a magnetic memory cell MR in plan view.

Claims

1. A semiconductor device, comprising:

a semiconductor chip having a magnetic memory cell; and

a magnetic shield member covering a region provided with the magnetic memory cell in the semiconductor chip,

wherein the magnetic shield member includes

a first shield member having a first facing region facing a first surface of the semiconductor chip,

a second shield member having a second facing region facing a second surface, being a surface on a side opposite to the first surface of the semiconductor chip, and

a resin layer having a portion thereof making contact with the first shield member and another portion thereof making contact with the second shield member.

2. The semiconductor device according to claim 1,

wherein the first shield member has a side facing region facing a side of the semiconductor chip, and

the resin layer makes contact with the side facing region.

3. The semiconductor device according to claim 2,

wherein the resin layer makes contact with an end portion of the side facing region, and

the end portion of the side facing region has an inclined surface inclined relative to the second facing region of the second shield member.

4. The semiconductor device according to claim 2,

wherein the resin layer makes contact with an end portion of the side facing region, and

the end portion of the side facing region has a convex portion on a side closer to the semiconductor chip in a thickness direction of the first shield member.

5. The semiconductor device according to claim 2,

wherein the resin layer makes contact with an end of the side facing region, and

the end of the side facing region is located on a side closer to the first surface than the second surface of the semiconductor chip.

6. The semiconductor device according to claim 2,

wherein the first shield member is a laminated material in which a resin layer and a soft magnetic material layer are laminated repeatedly.

7. The semiconductor device according to claim 2, further comprising a sealing resin that seals the semiconductor chip,

wherein the resin layer is the sealing resin,

at least a part of an end portion of the second shield member is exposed from a surface facing the side of the semiconductor chip of an outer surface of the sealing resin, and

the first shield member is provided along a surface facing the first surface of the semiconductor chip and a surface facing the side of the outer surface of the sealing resin.

8. The semiconductor device according to claim 1, further comprising a third shield member that is located in the resin layer and that faces a side of the semiconductor chip.

9. The semiconductor device according to claim 8,

wherein the third shield member has a width, when viewed from a surface parallel to the first facing region, larger than a thickness of the first shield member.

10. The semiconductor device according to claim 8,

wherein the third shield member has a width, when viewed from a surface parallel to the first facing region, larger than a thickness of the third shield member.

11. The semiconductor device according to claim 8,

wherein the third shield member is formed of a material having a saturation magnetic flux density higher than that of the first shield member and the second shield member.

12. The semiconductor device according to claim 1,

wherein the resin layer has a filler having a soft magnetic material.

13. The semiconductor device according to claim 1, further comprising a sealing resin that seals the semiconductor chip,

wherein the sealing resin and the resin layer contain a filler, and

the filler of the resin layer has an average particle diameter smaller than an average particle diameter of the filler of the sealing resin.

14. The semiconductor device according to claim 1, further comprising a plurality of electrode pads provided on an active surface of the semiconductor chip,

wherein a member facing the active surface among the first shield member and the second shield member does not overlap with the electrode pads in plan view.

15. The semiconductor device according to claim 14, further comprising:

a plurality of bonding wires having one end thereof coupled to the electrode pads; and

external coupling terminals coupled to another end of the bonding wires.