VERSATILE ZERO-VOLTAGE SWITCH RESONANT INVERTER FOR INDUSTRIAL DIELECTRIC BARRIER DISCHARGE GENERATOR APPLICATIONS

• US 20130257311A1
• Filed: 03/27/2012
• Published: 10/03/2013
• Est. Priority Date: 03/27/2012
• Status: Active Grant

• Current Assignee: MKS Instruments Incorporated
• Original Assignee: MKS Instruments Incorporated
• Inventors: TRAN, KEN, CHEN, XING, NEWMAN, RUSSELL L., LEE, FRANKLIN
• Granted Patent: US 8,680,777 B2
• Time in Patent Office: Days
• US Class Current: 315/279
• CPC Class Codes: H05B 45/00 Circuit arrangements for operating light-emitting diodes [LED]
• CPC Class Codes: Y02B 20/30 Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

A power system for a dielectric barrier discharge system, such as used for generating ozone, can include a full bridge inverter stage and parallel resonant tank outputting a signal for powering a dielectric barrier discharge cell stack. The inverter stage is controlled using a combination of pulse width modulation (PWM) and frequency modulation (FM) to enable soft switching through all load conditions—from full load to light load. A current control loop error amplifier compensator can provide a duty cycle adjustment signal to a phase shift PWM controller chip that generates the switching signals for the inverter stage. A feedback signal is also used to adjust a clock frequency time constant of the PWM controller chip to provide the FM. In one embodiment, the feedback signal is an output of an inverting amplifier connected at an output of the current control loop error amplifier compensator.

Claims

1. A dielectric barrier discharge power system comprising:

an inverter stage;

a resonant tank receiving an output of the inverter stage and outputting a signal for powering at least one dielectric barrier discharge cell; and

a control circuit comprising;

a gate driver providing switching signals to the inverter stage, the switching signals including a phase shift for soft switching; and

a pulse width modulation (PWM) controller for generating a switching frequency for the gate driver, the PWM controller having a first input configured to receive a first signal for adjusting a duty cycle of the switching frequency to perform PWM and a second input configured to receive a second signal for adjusting a clock frequency time constant of the PWM controller to perform frequency modulation (FM);

wherein the control circuit receives a feedback signal from the dielectric barrier discharge system and uses the feedback signal to generate the first signal and the second signal according to a load or line value of the dielectric barrier discharge system.

2. The dielectric barrier discharge power system according to claim 1, wherein the inverter stage comprises four transistors arranged as a full bridge.

3. The dielectric barrier discharge power system according to claim 2, wherein the four transistors are insulated gate bipolar transistors (IGBTs).

4. The dielectric barrier discharge power system according to claim 1, further comprising a transformer stepping up the signal from the resonant tank for powering the at least one dielectric barrier discharge cell.

5. The dielectric barrier discharge power system according to claim 1, wherein the switching frequency is in a range of 20 kHz to 40 kHz.

6. The dielectric barrier discharge power system according to claim 1, wherein the switching frequency is configured to be higher than a resonant frequency of the resonant tank.

7. The dielectric barrier discharge power system according to claim 1, wherein the feedback signal comprises a measured current signal received from a current sensor at the output of the inverter stage.

8. The dielectric barrier discharge power system according to claim 7, wherein during all load conditions, the measured current signal is compared to a current set point value and an error value of the comparison causes the first signal to adjust the duty cycle of the switching frequency to perform the PWM until the measured current reaches the current set point value, the error value of the comparison further causing the second signal to adjust the clock frequency time constant to change to perform the FM;

and

the control circuit is configured such that an amount of weight given to the PWM and the FM for controlling power changes as the dielectric barrier discharge power system operates from a full load condition to a light load condition.

9. The dielectric barrier discharge power system according to claim 7, wherein the control circuit comprises a current control loop for generating the first signal and the second signal, the current control loop using the measured current signal sensed at the output of the inverter stage and a current set point.

10. The dielectric barrier discharge power system according to claim 9, wherein the current control loop comprises:

an error amplifier compensator receiving the measured current signal and the current set point and outputting the first signal; and

an inverting amplifier receiving the first signal and outputting the second signal.

11. The dielectric barrier discharge power system according to claim 9, wherein the current control loop comprises:

an error amplifier compensator receiving the measured current signal and the current set point and outputting the first signal; and

an inverting amplifier receiving an added signal of the measured current signal and a current set point and outputting the second signal.

12. The dielectric barrier discharge power system according to claim 9, wherein the feedback signal further comprises an input power signal, the input power signal being a product of a measured DC bus voltage supplied to the inverter stage and a measured DC bus current supplied to the inverter stage;

wherein the current control loop comprises;

an error amplifier compensator receiving the measured current and the current set point and outputting the first signal; and

an inverting amplifier receiving the input power signal and outputting the second signal.

13. The dielectric barrier discharge power system according to claim 9, wherein the feedback signal further comprises an output power signal, the output power signal being a product of a measured DC output voltage and the measured current;

wherein the current control loop comprises;

an error amplifier compensator receiving the measured current and the current set point and outputting the first signal; and

an inverting amplifier receiving the output power signal and outputting the second signal.

14. The dielectric barrier discharge power system according to claim 9, further comprising a processor configured to:

receive a measurement of a DC bus voltage and current supplied to the inverter stage, the measurement of the DC bus voltage and the current being scaled and multiplied together to provide a power feedback signal;

add the power feedback signal to a power set point; and

perform a digital error compensation using the power feedback signal and the power set point to output the current set point for the current control loop.

15. A method of generating dielectric barrier discharge, the method comprising:

providing an inverter stage and resonant tank for powering at least one dielectric barrier discharge cell; and

generating switching signals for the inverter stage using a control circuit, the switching signals including a phase shift for soft switching, wherein generating the switching signals comprises;

performing pulse width modulation (PWM) of a switching frequency of the switching signals to maintain an output current of the inverter stage at a current set point value; and

performing frequency modulation (FM) in parallel with performing the PWM, the FM increasing a switching frequency of the switching signals to reduce output power during a light load condition.

16. The method according to claim 15, wherein the switching signals have a frequency in a range of 20 kHz to 40 kHz.

17. The method according to claim 15, wherein performing the PWM comprises:

providing a PWM controller for generating the switching frequency for a gate driver, the PWM controller having a first input configured to receive a first signal for adjusting a duty cycle of the switching frequency to perform PWM and a second input configured to receive a second signal for adjusting a clock frequency time constant of the PWM controller to perform FM;

sensing an output current of the inverter stage;

comparing the output current to a current set point by performing error amplifier compensation; and

using the error amplifier compensation as the first signal.

18. The method according to claim 17, wherein performing the FM comprises:

inverting the error amplifier compensation using an inverting amplifier, the inverting amplifier outputting the second signal.

19. The method according to claim 18, wherein performing the FM further comprises:

adjusting a gain of the inverting amplifier.

20. The method according to claim 17, further comprising:

receiving a measurement of a DC bus voltage supplied to the inverter stage and a measurement of a DC bus current supplied to the inverter stage, the measurements of the DC bus voltage and the DC bus current being scaled and multiplied together to provide a power feedback signal;

adding the power feedback signal to a power set point; and

performing a digital error compensation using the power feedback signal and the power set point to output the current set point.