RAID MEMORY SYSTEM

• US 20130262920A1
• Filed: 02/20/2013
• Published: 10/03/2013
• Est. Priority Date: 04/02/2012
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Yang-Sup, Jung, Min-Wook
• Application Number:
  US13/771,477
• Publication Number:
  US 20130262920A1
• Time in Patent Office: Days
• US Class Current: 714/6.22
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

A redundant array of inexpensive or independent disks (RAID) memory system comprises a nonvolatile memory device and a memory controller. The nonvolatile memory comprises a stripe block. The memory controller determines a value based on at least one of a program/erase (P/E) cycle and a read error frequency of the stripe block and determines whether to change a size of the stripe block based on the determined value.

Claims

1. A redundant array of inexpensive disks (RAID) memory system comprising:

a nonvolatile memory device comprising a stripe block; and

a memory controller configured to determine a value based on at least one of a program/erase (P/E) cycle and a read error frequency of the stripe block and determine whether to change a size of the stripe block based on the determined value.

2. The RAID memory system of claim 1, wherein the memory controller determines a reliability of data stored in the stripe block using the determined value, and determines whether to change the size of the stripe block based on the determined reliability.

3. The RAID memory system of claim 2, wherein the memory controller determines whether to change the size of the stripe block based on the determined reliability and a degree to which the size of the stripe block is to be changed.

4. The RAID memory system of claim 1, wherein the stripe block comprises a first RAID parity and the memory controller generates a second RAID parity corresponding to the stripe block of the changed size.

5. The RAID memory system of claim 4, wherein a first number of RAID parity parities stored in the nonvolatile memory device before the change of size is different from a second number of RAID parity parities stored in the nonvolatile memory device after the change of size.

6. The RAID memory system of claim 2, wherein the size of the stripe block is reduced when the determined reliability is increased.

7. The RAID memory system of claim 1, wherein the nonvolatile memory device comprises a plurality of nonvolatile memory chips, each having a plurality of physical blocks, wherein each stripe block comprises some of the physical blocks.

8. The RAID memory system of claim 7, wherein the change of the size of the stripe block changes the number of the physical blocks that constitute the stripe block.

9. The RAID memory system of claim 7, wherein the nonvolatile memory device records first data about what physical blocks are included in each stripe block, second data about in which of the stripe blocks each physical block is included, and third data about at least one of the P/E cycle and the read error frequency of each physical block.

10. The RAID memory system of claim 9, wherein the determination of the at least one of the P/E cycle and the read error frequency of the stripe block is performed by collecting the third data of the physical blocks included in the stripe block.

11. The RAID memory system of claim 9, wherein the memory controller performs a RAID recovery when an error occurs in one of the physical blocks included in the nonvolatile memory device, wherein the performing of the RAID recovery comprises searching for one of the stripe blocks which comprises the one physical block using the second data, searching for a plurality of the physical blocks included in the one stripe block using the first data, and recovering error data using data stored in pages of the found physical blocks.

12. A RAID memory system comprising:

a nonvolatile memory device comprising a plurality of nonvolatile memory chips and a plurality of stripe blocks, each memory chip having a plurality of physical blocks, and each stripe block including some of the physical blocks; and

a memory controller configured to perform a RAID recovery when an error occurs in one of the physical blocks included in the nonvolatile memory device,

wherein the nonvolatile memory device records first data about what physical blocks are included in each stripe block, second data about in which of the stripe blocks each physical block is included and third data about at least one of a P/E cycle and a read error frequency of each physical block, and performs the RAID recovery by searching for one of the stripe blocks which comprises the one physical block using the second data, searching for a plurality of the physical blocks included in the one stripe block using the first data, and recovering error data using data stored in pages of the found physical blocks.

13. The RAID memory system of claim 12, wherein the stripe blocks comprise first and second stripe blocks, wherein a size of the first stripe block is different from a size of the second stripe block.

14. The RAID memory system of claim 12, wherein the memory controller determines a value based on at least one of the P/E cycle and the read error frequency of each stripe block and determines whether to change the size of each stripe block based on the determined values.

15. The RAID memory system of claim 14, wherein in the determining of whether to change the size of each stripe block based on the determined values, a reliability of data stored in each stripe block is determined using the determined values, and whether to change the size of each stripe block is determined based on the corresponding reliability.

16. A redundant array of inexpensive disks (RAID) memory system comprising:

a nonvolatile memory device comprising a stripe block; and

a memory controller configured to determine a reliability of data stored in the stripe block, wherein the memory controller decreases a size of the stripe block when the reliability is below a threshold value, increases a size of the stripe block when the reliability is above the threshold value, and keeps the size of the stripe block constant when the reliability is equal to the threshold value.

17. The RAID memory system of claim 16, wherein the reliability is based on at least one of a P/E cycle and a read error frequency of the stripe block.

18. The RAID memory system of claim 16, wherein the reliability is a sum of a first term based on the P/E cycle and a second term based on the read error frequency.

19. The RAID memory system of claim 18, wherein the first term includes a first variable multiplied by the P/E cycle and the second term includes a second variable multiplied by the read error frequency.

20. The RAID memory system of claim 16, wherein increasing the size of the stripe block increases a number of physical blocks located within the stripe bock and decreasing the size of the stripe block decreases the number of physical blocks.