FLASH MEMORY LIFETIME EVALUATION METHOD

• US 20130262942A1
• Filed: 03/27/2012
• Published: 10/03/2013
• Est. Priority Date: 03/27/2012
• Status: Abandoned Application

• Current Assignee: Fluiditech IP Limited
• Original Assignee: Yung-Chiang Chu
• Inventors: CHU, Yung-Chiang
• Application Number:
  US13/431,336
• Publication Number:
  US 20130262942A1
• Time in Patent Office: Days
• US Class Current: 714/718
• CPC Class Codes: G11C 16/3495 Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically

Abstract

A flash memory lifetime evaluation method is introduced for dynamically amending, detecting and evaluating an ideal lifetime (or standard lifetime) of a built-in or expanded flash memory of an electronic device, and the method comprises the steps of calculating the ideal lifetime according to the capacity of the flash memory, creating a spare area in at least one of the flash memory and the control center, generating a testing command by the control center and transmitting the testing command to the flash memory such that the flash memory executes a memory test according to the testing command, and the flash memory feeds back a test result to the spare area as an amend parameter according to the memory test, and the control center retrieves the amend parameter stored in the spare area to selectively amend the ideal lifetime by the amend parameter.

Claims

1. A flash memory lifetime evaluation method, provided for a control center to dynamically amend, detect and evaluate an ideal lifetime of a built-in or extended flash memory of an electronic device, and the method comprising the steps of:

detecting a capacity of a memory block, a memory page and a memory cell in the flash memory, and calculating the ideal lifetime of the flash memory by a structure type of the flash memory;

creating a spare area in at least one of the flash memory and the control center;

generating a testing command by the control center and transmitting the testing command to the flash memory, such that the flash memory executes a memory test according to the testing command, and the flash memory feeds back a test result to the spare area according to the memory test to form an amend parameter; and

retrieving the amend parameter in the spare area by the control center, to selectively amend the ideal lifetime by the amend parameter.

2. The flash memory lifetime evaluation method of claim 1, wherein the ideal lifetime is amended by a product of the amend parameter and the ideal lifetime.

3. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a recorded number of times of executing a read command, a write command and an erase command in each of the memory block, the memory page and the memory cell of the flash memory separately.

4. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is an average wear state of the memory block, the memory page and the memory cell in the flash memory recorded according to a wear-leveling algorithm.

5. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a recorded error correction code bit fed back by an error correction code engine to the flash memory for performing a correction.

6. The flash memory lifetime evaluation method of claim 5, wherein the amend parameter further includes a voltage state of a ready/busy pin (R/B pin) in the flash memory detected to determine whether the voltage state is constantly maintained at a fixed electric potential before the error correction code engine reports the error correction code bit of the flash memory.

7. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a recorded number of detected damaged memory blocks, memory pages and memory damages after the testing command is executed in the flash memory.

8. The flash memory lifetime evaluation method of claim 7, further comprising the steps of executing the testing command in the flash memory continuously to compare an increased number of damaged memory blocks, memory pages and memory cells and a damage speed between the previous time and the next time.

9. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a recorded number of bits of the error correction code bit in specific memory blocks, memory pages and memory cells that produce an unstable change state, after the read command is executed for a plurality of times for the specific memory block, memory page and memory cell of the flash memory.

10. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a correction state of other recorded and monitored memory block, memory page and memory cell adjacent to specific memory block, memory page and memory cell, after the read command is executed for a plurality of times for the specific memory block, memory page and memory cell of the flash memory.

11. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a recorded unable state of the test result fed back by the flash memory after the electronic device executes the read command, write command and erase command in the flash memory.

12. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a recorded abnormal voltage state of a pin in the flash memory, after the electronic device executes the read command, write command and erase command in the flash memory.

13. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a recorded unstable voltage change sate of specific memory block, memory page and memory cell when the flash memory operates the specific memory block, memory page and the memory cell.

14. The flash memory lifetime evaluation method of claim 1, wherein the amend parameter is a recorded state of a chip enable pin in the flash memory failing to execute an erase of a chip having the memory block, the memory page and the memory cell according to the erase command, after the flash memory executes the erase command.

15. The flash memory lifetime evaluation method of claim 1, wherein the control center is a control driver or a remote monitoring server that controls the flash memory.

16. The flash memory lifetime evaluation method of claim 15, wherein the control center dynamically amend, detect and evaluate the ideal lifetime of a built-in or expanded flash memory of the electronic device via the Internet.

17. The flash memory lifetime evaluation method of claim 1, wherein the structure type flash memory is a single-level cell or multi-level cell NOR or NAND flash memory.