SEMICONDUCTOR DEVICE

• US 20130270637A1
• Filed: 03/25/2013
• Published: 10/17/2013
• Est. Priority Date: 03/23/2011
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Morioka, Jun, Shirai, Koji, Takahashi, Keita, Yamada, Tsubasa, KOMATSU, Kanako, Shimizu, Mariko
• Application Number:
  US13/850,124
• Publication Number:
  US 20130270637A1
• Time in Patent Office: Days
• US Class Current: 257/339
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/0886 Shape
• CPC Class Codes: H01L 29/1045 the doping structure being parallel to the channel length, e.g. DMOS like
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/7816 Lateral DMOS transistors, i.e. LDMOS transistors
• CPC Class Codes: H01L 29/7823 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7835 with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Abstract

A first semiconductor layer extends from the element region to the element-termination region, and functions as a drain of the MOS transistor. A second semiconductor layer extends, below the first semiconductor layer, from the element region to the element-termination region. A third semiconductor layer extends from the element region to the element-termination region, and is in contact with the second semiconductor layer to function as a drift layer of the MOS transistor. A distance between a boundary between the first semiconductor layer and the field oxide film, and the end portion of the third semiconductor layer on the fifth semiconductor layer side in the element region is smaller than that between a boundary between the first semiconductor layer and the field oxide layer and an end portion of the third semiconductor layer on the fifth semiconductor layer side in the element-termination region.

Claims

1-20. -20. (canceled)

21. A semiconductor device, comprising:

a semiconductor substrate;

a source layer formed on the semiconductor substrate; and

a drain layer formed on the semiconductor substrate, the drain layer being formed to face the source layer in a first direction with a channel region and a drift layer therebetween, and the drain layer being formed to extend in a second direction orthogonal to the first direction;

wherein

a distance along the first direction from the drain layer to an edge of the drift layer on a side of the source layer is larger in an end portion of the drain layer than in a center of the drain layer in the second direction.

22. The semiconductor device according to claim 21, wherein

the drift layer is formed to surround the drain layer, and includes a first part in a vicinity of the center of the drain layer and a second part in a vicinity of the end portion of the drain layer.

23. The semiconductor device according to claim 22, wherein

the first part has a first width along the first direction, and the the second part has a second width larger than the first width along the first direction.

24. The semiconductor device according to claim 22, wherein

the second part has a polygon shape.

25. The semiconductor device according to claim 22, wherein

the first part is formed in an element region including an MOS transistor formed thereon, and

the second part is formed in an element termination region formed at an end region of the element region.

26. The semiconductor device according to claim 22, further comprising a field oxide film formed on a surface of the drift layer.

27. The semiconductor device according to claim 21, wherein

the source layer, the drain layer and the drift layer have a first conductivity type, and

the impurity concentration of the drift layer is lower than that of the drain layer.

28. The semiconductor device according to claim 21, further comprising a gate electrode formed on the channel region via an insulating film to surround the drain layer,

wherein a distance along the first direction from the drain layer to an edge of the gate electrode is larger in an end portion of the drain layer than in a center of the drain layer in the second direction.

29. A semiconductor device, comprising:

a semiconductor substrate;

a source layer formed on the semiconductor substrate; and

a drain layer formed on the semiconductor substrate, the drain layer being formed to face the source layer in a first direction with a channel region therebetween, and the drain layer being formed to extend in a second direction orthogonal to the first direction; and

a gate electrode formed on the channel region via an insulating film to surround the drain layer,

wherein

a distance along the first direction from the drain layer to an edge of the gate electrode is larger in an end portion of the drain layer than in a center of the drain layer in the second direction.

30. The semiconductor device according to claim 29, wherein

the gate electrode is formed to surround the drain layer, and includes a first part in a vicinity of the center of the drain layer and a second part in a vicinity of the end portion of the drain layer.

31. The semiconductor device according to claim 30, wherein

the first part has a first width along the first direction, and the the second part has a second width larger than the first width along the first direction.

32. A semiconductor device, comprising:

a semiconductor substrate;

a source layer formed on the semiconductor substrate; and

a drain layer formed on the semiconductor substrate, the drain layer being formed to face the source layer in a first direction with a channel region and a drift layer therebetween, and the drain layer being formed to extend in a second direction orthogonal to the first direction,

wherein

the drift layer is formed to surround the drain layer, and includes a first part in the vicinity of the center of the drain layer and a second part in the vicinity of the end portion of the drain layer, the second part being enlarged compared to the first part.

33. The semiconductor device according to claim 32, wherein

the first part has a first width along the first direction, and the the second part having a second width larger than the first width along the first direction.

34. The semiconductor device according to claim 32, wherein

the second part has a polygon shape.

35. The semiconductor device according to claim 32, wherein

the first part is formed in an element region including an MOS transistor formed thereon, and

the second part is formed in an element termination region formed at an end region of the element region.

36. The semiconductor device according to claim 32, further comprising a field oxide film formed on a surface of the drift layer.

37. The semiconductor device according to claim 32, wherein

the source layer, the drain layer and the drift layer have a first conductivity type,

the impurity concentration of the drift layer is lower than that of the drain layer.

38. The semiconductor device according to claim 32, further comprising a gate electrode formed on the channel region via an insulating film to surround the drain layer,

wherein the gate electrode includes a third part in the vicinity of the center of the drain layer and a fourth part in the vicinity of the end portion of the drain layer, an area surrounded by the fourth part is larger than that surrounded by the third part.

39. A semiconductor device, comprising:

a semiconductor substrate;

a source layer formed on the semiconductor substrate; and

a drain layer formed on the semiconductor substrate, the drain layer being formed to face the source layer in a first direction with a channel region therebetween, and the drain layer being formed to extend in a second direction orthogonal to the first direction; and

a gate electrode formed on the channel region via an insulating film to surround the drain layer,

wherein

the gate electrode is formed to surround the drain layer, and includes a first part in the vicinity of the center of the drain layer and a second part in the vicinity of the end portion of the drain layer, an area surrounded by the second part is larger than that surrounded by the first part.

40. The semiconductor device according to claim 39, wherein

an area surrounded by the first part has a first width along the first direction, and an area surrounded by the second part has a second width larger than the first width along the first direction.