ADDRESS SPACE MANAGEMENT WHILE SWITCHING OPTICALLY-CONNECTED MEMORY

• US 20130275704A1
• Filed: 02/06/2013
• Published: 10/17/2013
• Est. Priority Date: 04/13/2012
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: SCHENFELD, Eugen, CHAKRABORTY, Abhirup
• Granted Patent: US 9,104,586 B2
• Time in Patent Office: Days
• US Class Current: 711/165
• CPC Class Codes: G06F 12/023 Free address space management
• CPC Class Codes: G06F 12/0284 Multiple user address space allocation, e.g. using different base addresses interprocessor communication G06F15/163
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 12/0891 using clearing, invalidating or resetting means
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 13/404 with address mapping
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 13/42 Bus transfer protocol, e.g. handshake; Synchronisation
• CPC Class Codes: G06F 2212/50 Control mechanisms for virtual memory, cache or TLB
• CPC Class Codes: G06F 2212/60 Details of cache memory
• CPC Class Codes: G06F 2212/683 Invalidation
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0631 by allocating resources to storage systems
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]

Abstract

A remote processor is signaled for receiving a remote machine memory address (RMMA) space that contains data to be transferred. The RMMA space is mapped to a free portion of a system memory address (SMA) space of the remote processor. The entries of a page table corresponding to the address space are created.

Claims

1. In an optically-connected memory (OCM) system, a method for address space management, comprising:

signaling a remote processor for receiving a remote machine memory address (RMMA) space that contains data to be transferred, and

mapping the RMMA space to a free portion of a system memory address (SMA) space of the remote processor, wherein entries of a page table corresponding to the SMA space are created.

2. The method of claim 1, further including performing the signaling and the mapping on a side of a source node.

3. The method of claim 1, further including performing the signaling and the mapping while dynamically switching the memory through the optical-switching fabric using a selected one of a plurality of available communication patterns to transfer the RMMA space in the memory blades from one of the plurality of processors to an alternative one of the plurality of processors in the processor blades without physically copying data in the memory to the plurality of processors.

4. The method of claim 3, further including:

supplying a set of remote memory superpages by an optical plane, and

assimilating the remote memory superpages by grafting the remote memory superpages into the SMA space of the remote processor for creating a mapping within the page table.

5. The method of claim 4, further including transparently accessing the remote memory superpages on the remote processor by a plurality of applications.

6. The method of claim 3, further including observing, for similar data, by a memory controller on a remote memory blade for the remote processor, the RMMA space that is identical to the RMMA space in a source processor.

7. The method of claim 3, further including distinguishing ranges of the RMMA space that are overlapping based on one of a channel identification (ID) and a blade ID.

8. The method of claim 3, wherein the memory blades are communicatively coupled with the plurality of processors in the optical-switching fabric via an optical circuit network comprising a plurality of optical external links and at least one optical circuit switch, and further including allowing access of the plurality of processors to the memory in the memory blades through at least one independent circuit established between the processor blades and the memory blades within the optical circuit network.

9. The method of claim 8, further including sharing the memory in the memory blades between more than one of the plurality of processors by occupying a non-overlapping portion of the memory.

10. The method of claim 3, further including:

allocating memory from one of the memory blades upon receiving a memory request from the one of the plurality of processors, wherein a circuit is established with the memory for the one of the plurality of processors, the RMMA space of the memory sent to the one of the plurality of processors,

retaining a remote memory superpage of the memory in the memory blade when reading the remote memory super page of the memory into the one of the plurality of processors, and

transferring a physical memory address space from the one of the processors to the alternative one of the plurality of processors.

11. The method of claim 3, further including performing:

sending metadata and a switching request to the one of the plurality of processors,

adjusting the RMMA space and flushing a translation look-aside buffer (TLB),

performing an unmapping operation for removing entries in the page tables that map a linear address to the RMMA space,

dynamically switching the memory from an active node of the one of the plurality of processors to a remote active node of the alternative one of the plurality of processors, and

using page tables by the remote processor for instantaneous access to the data.

12. An optically-connected memory (OCM) system for address space management, comprising:

at least one processor device operable in the computing storage environment, wherein the at least one processor device;

signals a remote processor for receiving a remote machine memory address (RMMA) space that contains data to be transferred, and

maps the RMMA space to a free portion of a system memory address (SMA) space of the remote processor, wherein entries of a page table corresponding to the SMA space are created.

13. The system of claim 12, further including:

a plurality of nodes, in communication with the at least one processor device, including at least a source node, passive nodes, and receiving nodes,

at least one processor blade,

at least one memory blade, remotely separated from the at least one processor blade,

an optical plane,

the least one processor device arranged in one of the at least one processor blade and the at least one memory blade and in communication with the optical plane,

a translation look-aside buffer (TLB) in communication with the at least one processor device and the optical plane,

at least one memory in the at least one memory blade, and

an optical switching fabric communicatively coupled between the at least one processor blade and the at least one memory blade and in communication with the at least one processor device.

14. The system of claim 13, wherein the at least one processor device performs the signaling and the mapping on a side of the source node.

15. The system of claim 13, wherein the at least one processor device performs the signaling and the mapping while dynamically switching the memory through the optical-switching fabric using a selected one of a plurality of available communication patterns to transfer the RMMA space in the memory blades from one of the plurality of processors to an alternative one of the plurality of processors in the processor blades without physically copying data in the memory to the plurality of processors.

16. The system of claim 13, wherein:

the optical plane supplies a set of remote memory superpages by the optical plane, and

the at least one processor device assimilates the remote memory superpages by grafting the remote memory superpages into the SMA space of the remote processor for creating a mapping within the page table.

17. The system of claim 16, wherein the at least one processor device transparently accesses the remote memory superpages on the remote processor by a plurality of applications.

18. The system of claim 13, further including a source processor, wherein the at least one processor device observes, for similar data, by a memory controller on a remote memory blade for the remote processor, the RMMA space that is identical to the RMMA space in the source processor.

19. The system of claim 13, wherein the at least one processor device distinguishes ranges of the RMMA space that are overlapping based on one of a channel identification (ID) and a blade ID.

20. The system of claim 13, further including an optical circuit network comprising a plurality of optical external links and at least one optical circuit switch, wherein the memory blades are communicatively coupled with the plurality of processors in the optical-switching fabric via the optical circuit network, where the at least one processor device allows access of the plurality of processors to the memory in the memory blades through at least one independent circuit established between the processor blades and the memory blades within the optical circuit network.

21. The system of claim 20, wherein the at least one processor device shares the memory in the memory blades between more than one of the plurality of processors by occupying a non-overlapping portion of the memory.

22. The system of claim 13, wherein the at least one processor device:

allocates memory from one of the memory blades upon receiving a memory request from the one of the plurality of processors, wherein a circuit is established with the memory for the one of the plurality of processors, the RMMA space of the memory sent to the one of the plurality of processors,

retains a remote memory superpage of the memory in the memory blade when reading the remote memory super page of the memory into the one of the plurality of processors, and

transfers a physical memory address space from the one of the processors to the alternative one of the plurality of processors.

23. The system of claim 13, wherein the at least one processor device:

sends metadata and a switching request to the one of the plurality of processors,

adjusts the RMMA space and flushing a translation look-aside buffer (TLB),

performs an unmapping operation for removing entries in the page tables that map a linear address to the RMMA space,

dynamically switches the memory from an active node of the one of the plurality of processors to a remote active node of the alternative one of the plurality of processors, and

uses page tables by the remote processor for instantaneous access to the data.

24. In an optically-connected memory (OCM) system, for address space management, a computer program product in a computing environment using a processor device, the computer program product comprising a computer-readable storage medium having computer-readable program code portions stored therein, the computer-readable program code portions comprising:

a first executable portion that signals a remote processor for receiving a remote machine memory address (RMMA) space that contains data to be transferred; and

a second executable portion that maps the RMMA space to a free portion of a system memory address (SMA) space of the remote processor, wherein entries of a page table corresponding to the SMA space are created.

25. The computer program product of claim 24, wherein the optically-connected memory (OCM) system includes a plurality of processors arranged in processor blades and memory in memory blades, with each of the processor blades and the memory blades organized in racks communicatively coupled through an optical-switching fabric, the processor blades and the memory blades remotely separated.

26. The computer program product of claim 25, further including a third executable portion that performs the signaling and the mapping on a side of a source node.

27. The computer program product of claim 25, further including a third executable portion that performs the signaling and the mapping while dynamically switching the memory through the optical-switching fabric using a selected one of a plurality of available communication patterns to transfer the RMMA space in the memory blades from one of the plurality of processors to an alternative one of the plurality of processors in the processor blades without physically copying data in the memory to the plurality of processors.

28. The computer program product of claim 25, further including a third executable portion that:

supplies a set of remote memory superpages by an optical plane, and

assimilates the remote memory superpages by grafting the remote memory superpages into the SMA space of the remote processor for creating a mapping within the page table.

29. The computer program product of claim 28, further including a third executable portion that accesses the remote memory superpages on the remote processor by a plurality of applications.

30. The computer program product of claim 25, further including a third executable portion that observes, for similar data, by a memory controller on a remote memory blade for the remote processor, the RMMA space that is identical to the RMMA space in a source processor.

31. The computer program product of claim 25, further including a third executable portion that distinguishes ranges of the RMMA space that are overlapping based on one of a channel identification (ID) and a blade ID.

32. The computer program product of claim 25, wherein the memory blades are communicatively coupled with the plurality of processors in the optical-switching fabric via an optical circuit network comprising a plurality of optical external links and at least one optical circuit switch, and further including a third executable portion that allows access of the plurality of processors to the memory in the memory blades through at least one independent circuit established between the processor blades and the memory blades within the optical circuit network.

33. The computer program product of claim 25, further including a fourth executable portion that shares the memory in the memory blades between more than one of the plurality of processors by occupying a non-overlapping portion of the memory.

34. The computer program product of claim 25, further including a third executable portion that:

allocates memory from one of the memory blades upon receiving a memory request from the one of the plurality of processors, wherein a circuit is established with the memory for the one of the plurality of processors, the RMMA space of the memory sent to the one of the plurality of processors,

retains a remote memory superpage of the memory in the memory blade when reading the remote memory super page of the memory into the one of the plurality of processors, and

transfers a physical memory address space from the one of the processors to the alternative one of the plurality of processors.

35. The computer program product of claim 25, further including a third executable portion that:

sends metadata and a switching request to the one of the plurality of processors,

adjusts the RMMA space and flushing a translation look-aside buffer (TLB),

performs an unmapping operation for removing entries in the page tables that map a linear address to the RMMA space,

dynamically switches the memory from an active node of the one of the plurality of processors to a remote active node of the alternative one of the plurality of processors, and

uses page tables by the remote processor for instantaneous access to the data.