ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME
First Claim
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1. An array substrate, comprising:
- a substrate including a pixel region;
a gate line on the substrate;
a gate electrode on the substrate and connected to the gate line;
a gate insulating layer on the gate line and the gate electrode;
a data line on the gate insulating layer and crossing the gate line to define the pixel region;
a source electrode and a drain electrode on the gate insulating layer and corresponding to the gate electrode, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; and
an oxide semiconductor layer on top of the source and drain electrodes.
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Abstract
An array substrate including a substrate including a pixel region; a gate line on the substrate; a gate electrode on the substrate and connected to the gate line; a gate insulating layer on the gate line and the gate electrode; a data line on the gate insulating layer and crossing the gate line to define the pixel region; a source electrode and a drain electrode on the gate insulating layer and corresponding to the gate electrode, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; and an oxide semiconductor layer on top of the source and drain electrodes.
16 Citations
20 Claims
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1. An array substrate, comprising:
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a substrate including a pixel region; a gate line on the substrate; a gate electrode on the substrate and connected to the gate line; a gate insulating layer on the gate line and the gate electrode; a data line on the gate insulating layer and crossing the gate line to define the pixel region; a source electrode and a drain electrode on the gate insulating layer and corresponding to the gate electrode, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; and an oxide semiconductor layer on top of the source and drain electrodes. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method of manufacturing an array substrate, the method comprising:
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forming a gate line on a substrate including a pixel region; forming a gate electrode on the substrate and connected to the gate line; forming a gate insulating layer on the gate line and the gate electrode; forming a data line on the gate insulating layer and crossing the gate line to define the pixel region; forming a source electrode and a drain electrode on the gate insulating layer and corresponding to the gate electrode, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; and forming an oxide semiconductor layer on top of the source and drain electrodes. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification