CAPACITANCE TO CODE CONVERTER WITH SIGMA-DELTA MODULATOR

• US 20130278447A1
• Filed: 06/13/2013
• Published: 10/24/2013
• Est. Priority Date: 11/14/2006
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Kremin, Viktor
• Granted Patent: US 9,166,621 B2
• Time in Patent Office: Days
• US Class Current: 341/20
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: H03M 11/02 Details

Abstract

An apparatus and method of converting a capacitance measured on a sensor element to a digital value. The apparatus may include a matrix-scanning device including drive lines and sense lines. A sense element is located at an intersection of one of the drive lines and one of the sense lines. The apparatus also includes a modulation circuit coupled to the drive lines and the sense lines, and a switching circuit having first switches controlled by a clock. The modulation circuit is configured to measure a mutual capacitance on the sense element and to convert the measured mutual capacitance to a first digital value. The modulation circuit is configured to measure a self-capacitance on at least one of the drive lines and to convert the measured self-capacitance to a second digital value.

Claims

1. A method comprising:

measuring a mutual capacitance on a sense element of a matrix-scanning device using a modulation circuit, wherein the matrix-scanning device comprises a plurality of drive lines and a plurality of sense lines and the sense element is located at an intersection of one of the plurality of drive lines and one of the plurality of sense lines; and

switching the sense element to be coupled and decoupled to a capacitor of the modulation circuit using a first plurality of switches, wherein the first plurality of switches are controlled by a clock;

converting the mutual capacitance measured on the sense element to a first digital value;

measuring a self-capacitance on at least one of the plurality of drive lines;

switching the at least one of the plurality of drive lines to be coupled and decoupled to the capacitor using a second plurality of switches, wherein the second plurality of switches are controlled by the clock; and

converting the self-capacitance measured on the at least one of the plurality of drive lines to a second digital value.

2. The method of claim 1, wherein the matrix-scanning device comprises a plurality of sense elements comprising the sense element, wherein the plurality of sense elements are located at intersections between the plurality of drive lines and plurality of sense lines, and wherein said measuring comprises:

applying one or more drive signals to the plurality of drive lines; and

sensing one or more signals on one or more of the plurality of sense lines.

3. The method of claim 2, wherein the applying the one or more drive signals comprises applying the one or more drive signals in sequentially.

4. The method of claim 3, wherein the sensing the one or more signals comprises sensing the one or more signals on the plurality of sense lines in parallel.

5. The method of claim 2, wherein the applying the one or more drive signals comprises applying the one or more drive signal in parallel.

6. The method of claim 2, wherein the sensing the one or more signals on one or more of the plurality of sense lines comprises multiplexing two or more of the plurality of sense lines to the modulation circuit.

7. The method of claim 2, further comprising a plurality of modulation circuits coupled to the plurality of sense lines.

8. The method of claim 1, wherein the first digital value is commensurate to the measured mutual capacitance of the sense element.

9. The method of claim 1, wherein the first plurality of switches and the second plurality of switches are the same switches.

10. An apparatus, comprising:

a matrix-scanning device comprising a plurality of drive lines and a plurality of sense lines and a sense element is located at an intersection of one of the plurality of drive lines and one of the plurality of sense lines;

a modulation circuit selectively coupled to the plurality of drive lines and the plurality of sense lines; and

a switching circuit having a first plurality of switches and a second plurality of switches controlled in response to a clock, wherein the modulation circuit is configured to measure a mutual capacitance on the sense element using the first plurality of switches, wherein the modulation circuit is configured to convert the measured mutual capacitance to a first digital value, wherein the modulation circuit is configured to measure a self-capacitance on at least one of the plurality of drive lines using the second plurality of switches, and wherein the modulation circuit is configured to convert the self-capacitance to a second digital value.

11. The apparatus of claim 10, further comprising a clock circuit configured to provide at least one of a pseudo-random clock or a dithered clock as the clock to control the switching circuit.

12. The apparatus of claim 11, wherein the clock circuit comprises a pseudo-random signal (PRS) counter.

13. The apparatus of claim 10, further comprising:

an oscillator configured to provide an oscillator signal; and

a pseudo-random signal (PRS) circuit, comprising a PRS generator configured to receive the oscillator signal and to generate a PRS as the clock to control the switching circuit.

14. The apparatus of claim 10, further comprising a voltage-controlled oscillator (VCO) to provide the clock to control the switching circuit.

15. The apparatus of claim 10, further comprising a clock circuit to provide the clock to control the switching circuit.

16. The apparatus of claim 10, wherein the matrix-scanning device comprises a plurality of sense elements comprising the sense element, wherein the plurality of sense elements are located at intersections between the plurality of drive lines and plurality of sense lines.

17. The apparatus of claim 10, wherein the modulation circuit comprises a sigma-delta modulator.

18. The apparatus of claim 10, further comprising one or more digital filters coupled to receive an output of the modulation circuit, wherein the output of the modulation circuit is a digital output bitstream, and wherein the one or more digital filters are configured to convert the digital output bitstream into the digital value.

19. The apparatus of claim 10, wherein the first plurality of switches and the second plurality of switches are the same switches.

20. A system, comprising:

a matrix-scanning device comprising a plurality of sense elements, wherein the plurality of sense elements are intersections between a plurality of drive lines and a plurality of sense lines of the matrix-scanning device;

a processing device coupled to the matrix-scanning device, the processing device comprising;

a switching circuit having a first plurality of switches and a second plurality of switches, wherein the processing device is configured to control the first and second plurality of switches using a clock; and

a modulation circuit configured to be coupled to the plurality of drive lines and the plurality of sense lines, wherein the modulation circuit is configured to measure a mutual capacitance on the one sense element using the first plurality of switches, wherein the modulation circuit is configured to convert the measured mutual capacitance to a first digital value, wherein the modulation circuit is configured to measure a self-capacitance on at least one of the plurality of drive line using the second plurality of switches, and wherein the modulation circuit is configured to convert the measured self-capacitance to a second digital value.

21. The system of claim 20, wherein the processing device further comprises a pseudo-random signal (PRS) circuit coupled to the switching circuit and the modulation circuit, wherein the PRS circuit is configured to provide a PRS as the clock to control the switching circuit.

22. The system of claim 20, wherein the modulation circuit is a capacitance-to-duty-cycle converter, wherein the modulator duty cycle of the modulation circuit changes when a presence of a conductive object is detected on the one sense element.

23. The system of claim 20, wherein the first plurality of switches and the second plurality of switches are the same switches.