Multiple Stream Processing for Video Analytics and Encoding

• US 20130278775A1
• Filed: 10/24/2011
• Published: 10/24/2013
• Est. Priority Date: 10/24/2011
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Doddapuneni, Naveen, Mishra, Animesh, Rodriguez, Jose M.
• Application Number:
  US13/994,790
• Publication Number:
  US 20130278775A1
• Time in Patent Office: Days
• US Class Current: 348/159
• CPC Class Codes: H04N 19/132 Sampling, masking or truncation of coding units, e.g. adaptive resampling, frame skipping, frame interpolation or high-frequency transform coefficient masking
• CPC Class Codes: H04N 19/137 Motion inside a coding unit, e.g. average field, frame or block difference
• CPC Class Codes: H04N 19/156 Availability of hardware or computational resources, e.g. encoding based on power-saving criteria
• CPC Class Codes: H04N 19/172 the region being a picture, frame or field
• CPC Class Codes: H04N 7/155 involving storage of or access to video conference sessions tracking arrangements for later retrieval of a computer conference content or participants activities H04L12/1831
• CPC Class Codes: H04N 7/181 for receiving images from a plurality of remote sources

Abstract

Video analytics may be used to assist video encoding by selectively encoding only portions of a frame and using, instead, previously encoded portions. Previously encoded portions may be used when succeeding frames have a level of motion less than a threshold. In such case, all or part of succeeding frames may not be encoded, increasing bandwidth and speed in some embodiments.

Claims

1. A method comprising:

processing a plurality of video streams using time multiplexing; and

storing the processing context for each stream.

2. The method of claim 1 including processing one set of a plurality of streams simultaneously in a video encoder and a video analytics functional unit.

3. The method of claim 1 including receiving a plurality of simultaneous input video channels.

4. The method of claim 3 including copying each of said streams and send one set of copies to the video analytics functional unit and another set of copies to a video encoder.

5. The method of claim 2 including processing said streams using time multiplexing.

6. The method of claim 5 including storing the context of each stream in a register dedicated to that stream.

7. The method of claim 6 including providing a dedicated register for each stream for each of said encoder and video analytics functional unit.

8. The method of claim 2 including implementing processing changes on the fly.

9. The method of claim 8 including storing a processing change in a register and then, when a processing task is completed, implementing the processing change.

10. The method of claim 9 including providing dedicated registers for on the fly changes for each stream and for each of said encoder and said video analytics functional unit.

11. A non-transitory computer readable medium storing instructions to enable a computer processor to:

time multiplex a plurality of video streams;

process each stream according to a processing context; and

store the processing context for each stream.

12. The medium of claim 11 further storing instructions to process one set of a plurality of streams simultaneously in a video encoder and a video analytics functional unit.

13. The medium of claim 11 further storing instructions to receive a plurality of simultaneous input video channels.

14. The medium of claim 13 further storing instructions to copy each of said streams and send one set of copies to the video analytics functional unit and another set of copies to a video encoder.

15. The medium of claim 14 further storing instructions to process said streams using time multiplexing.

16. The medium of claim 15 further storing instructions to store the context of each stream in a register dedicated to that stream.

17. The medium of claim 16 further storing instructions to provide a dedicated register for each stream for each of said encoder and video analytics functional unit.

18. The medium of claim 17 further storing instructions to implement processing changes on the fly.

19. The medium of claim 15 further storing instructions to store a processing change in a register and then when a processing task is completed, implement the processing change.

20. The medium of claim 19 further storing instructions to provide dedicated registers for on the fly changes for each stream and for each of said encoder and said video analytics functional unit.

21. An integrated circuit comprising:

a video capture interface;

a main memory coupled to said video capture interface;

a pixel pipeline unit coupled to said main memory; and

a video encoder coupled to said pixel pipeline unit and said video capture interface, time multiplex a plurality of video streams, process each stream according to a processing context, and store the processing context for each stream.

22. The circuit of claim 21 wherein said circuit is an embedded dynamic random access memory.

23. The circuit of claim 22, said circuit to process a set of a plurality of streams simultaneously in a video encoder and a video analytics functional unit.

24. The circuit of claim 21, said video capture interface to receive a plurality of simultaneous input video channels and copy each of said input video channels.

25. The circuit of claim 24, said circuit to copy each of said streams and send one set of copies to the video analytics functional unit and another set of copies to a video encoder.

26. The circuit of claim 25, said circuit to process said streams using time multiplexing.

27. The circuit of claim 26 wherein said circuit to store the context of each stream in a register dedicated to that stream.

28. The circuit of claim 27, said circuit to provide a dedicated register for each stream for each of said encoder and video analytics functional unit.

29. The circuit of claim 25, said circuit to implement processing changes on the fly.

30. The circuit of claim 29, said circuit to store a processing change in a register and then when a processing task is completed, implement the processing change.