Charge Pump System
First Claim
Patent Images
1. An integrated circuit, comprising:
- a first charge pump including;
a plurality of serially arranged charge pump stages of the first charge pump arranged to pump a first voltage level from a first stage to a last stage of the first charge pump; and
inter-stage nodes between adjacent stages of the plurality of serially arranged charge pump stages; and
a second charge pump coupled to one or more of the inter-stage nodes of the first charge pump, the second charge pump arranged to pump one or more voltage levels of the one or more of the inter-stage nodes of the first charge pump, the second charge pump including;
a plurality of serially arranged charge pump stages of the second charge pump arranged to pump a second voltage level from a first stage to a last stage of the second charge pump,wherein an input clock signal received by the integrated circuit (i) determines a pumping frequency of the first charge pump, and (ii) clocks data including memory commands and memory addresses received by the integrated circuit.
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Abstract
In one aspect, a first charge pump has serially arranged charge pump stages. Inter-stage nodes between adjacent stages are pumped by a second charge pump. In another aspect, timing of the charge pump stages is controlled by at a command clock signal. The command clock signal and command data are communicated between a integrated circuit with the charge pump and an external circuit.
11 Citations
20 Claims
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1. An integrated circuit, comprising:
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a first charge pump including; a plurality of serially arranged charge pump stages of the first charge pump arranged to pump a first voltage level from a first stage to a last stage of the first charge pump; and inter-stage nodes between adjacent stages of the plurality of serially arranged charge pump stages; and a second charge pump coupled to one or more of the inter-stage nodes of the first charge pump, the second charge pump arranged to pump one or more voltage levels of the one or more of the inter-stage nodes of the first charge pump, the second charge pump including; a plurality of serially arranged charge pump stages of the second charge pump arranged to pump a second voltage level from a first stage to a last stage of the second charge pump, wherein an input clock signal received by the integrated circuit (i) determines a pumping frequency of the first charge pump, and (ii) clocks data including memory commands and memory addresses received by the integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method comprising:
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receiving, at an integrated circuit, an input clock signal that (i) determines a pumping frequency of the first charge pump, and (ii) clocks data including memory commands and memory addresses received by the integrated circuit; and pumping, on the integrated circuit, one or more voltage levels of one or more inter-stage nodes between adjacent stages of a first plurality of serially arranged charge pump stages of a first charge pump, with a second charge pump having a second plurality of serially arranged charge pump stages. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. (canceled)
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19. (canceled)
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20. (canceled)
Specification