Device Enumeration Support

• US 20130304944A1
• Filed: 10/04/2012
• Published: 11/14/2013
• Est. Priority Date: 05/14/2012
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Young, Robert D., Drasnin, Sharon, Fudally, Scott A., Mistry, Tejas Jitendra, Nikolaev, Vassili I., Ravirala, Murali Rangayya
• Granted Patent: US 9,098,304 B2
• Time in Patent Office: Days
• US Class Current: 710/16
• CPC Class Codes: G06F 1/1669 Detachable keyboards
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: G06F 11/3051 Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs verification or detection of system hardware configuration G06F11/2247
• CPC Class Codes: G06F 11/328 Computer systems status display G06F11/327 takes precedence
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 13/4291 using a clocked protocol
• CPC Class Codes: G06F 2203/04809 Textured surface identifying touch areas, e.g. overlay structure for a virtual keyboard
• CPC Class Codes: G06F 3/0202 Constructional details or processes of manufacture of the input device
• CPC Class Codes: G06F 3/04886 by partitioning the display area of the touch-screen or the surface of the digitising tablet into independently controllable areas, e.g. virtual keyboards or menus
• CPC Class Codes: G06F 3/167 Audio in a user interface, e.g. using voice commands for navigating, audio feedback
• CPC Class Codes: G06F 9/4415 Self describing peripheral devices
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Device enumeration support techniques are described for busses that do not natively support enumeration. In one or more embodiments, an intermediate controller of a computing device is configured to interconnect and manage various hardware devices associated with the computing device. The intermediate controller may detect connection and disconnection of hardware devices in association with one or more communication busses employed by the computing device. In response to such detection, the intermediate controller may send appropriate notifications to an operating system to alert the operating system when hardware devices come and go. This enables the operating system to enumerate and denumerate hardware devices within a device configuration and power management system implemented by the operating system that facilitates interaction with the hardware devices through corresponding representations.

Claims

1. A method comprising:

detecting by an intermediate controller of a computing device connection events for hardware devices configured to removably connect to a communication bus employed by the computing device that does not natively support device enumeration; and

notifying by the intermediate controller an operating system executed on a processor of the computing device of detected connection events to enable device enumeration for hardware devices configured to use the communication bus within a device configuration and power management system implemented by the operating system.

2. A method as described in claim 1, wherein the notifying comprises sending interrupts from the intermediate controller to the processor to signal the connection events to the operating system.

3. A method as described in claim 2, wherein the interrupts are communicated via a single control line disposed between the intermediate controller and the processor.

4. A method as described in claim 1, wherein the notifying comprises setting a value of a general purpose input/output (GPIO) pin according to the detected connection events.

5. A method as described claim 1, wherein the connection events include events corresponding to addition of hardware devices to the computing device and events corresponding to removal of hardware devices from the computing device.

6. A method as described in claim 1, wherein the device configuration and power management system implemented by the operating system is an advanced configuration and power management (ACPI) interface.

7. A method as described in claim 1, wherein data is communicated between the processor and the intermediate controller using an Inter-Integrated Circuit (I²C) bus.

8. A method as described in claim 1, wherein the notifying comprises sending an indication to the operating system responsive to connection of an accessory device to the communication bus to cause the device configuration and power management system to create a representation for the accessory device.

9. A method as described in claim 1, wherein the notifying comprises sending an indication to the operating system responsive to disconnection of an accessory device from the communication bus to cause the device configuration and power management system to remove an existing representation for the accessory device.

10. A method implemented by a computing device comprising:

detecting a first interrupt indicative of connection of an accessory device to the computing device via a communication bus employed by the computing device that does not natively support device enumeration;

retrieving device data for the accessory device including at least a device identifier;

enumerating the accessory device by creating a node for the accessory device within a device configuration and power management system implemented by the operating system based on the device identifier that is retrieved;

subsequently obtaining a second interrupt indicative of disconnection of the accessory device; and

denumerating the accessory device by removing the node for the accessory device from the device configuration and power management system.

11. A method as described in claim 10, wherein the first interrupt and the second interrupt are configured as general purpose input/output (GPIO) signals communicated via a control line associated with the communication bus.

12. A method as described in claim 10, wherein the first interrupt and the second interrupt are communicated to a processor of the computing device by an intermediate controller of the computing device for detection by the operating system executed on the processor.

13. A method as described in claim 12, wherein the intermediate controller is configured to connect to the processor and the accessory device via different respective communication busses.

14. A method as described in claim 10, further comprising exposing a user interface having a list of available hardware devices including the accessory device when enumerated to facilitate interaction with the available hardware devices.

15. A computing device comprising:

an interface configured to support a removable communicative coupling of an accessory device to a communication bus employed by the computing device that does not natively support device enumeration;

a processor configured to execute an operating system; and

an intermediate controller communicatively coupled to the interface and the processor, the intermediate controller configured to;

detect connection of the accessory device to the interface; and

set a general purpose input/output (GPIO) pin to a value indicative of the connection of the accessory device to notify the operating system of the connection and thereby cause the operating system to enumerate the accessory device within a device configuration and power management system implemented by the operating system.

16. A computing device as described in claim 15, wherein to enumerate the accessory device the operating system is configured to:

obtain a device identifier for the accessory device in response to reading the general purpose input/output (GPIO) pin value indicative of connection; and

create a representation of the accessory device in a device table associated with the device configuration and power management system to facilitate interaction with the accessory device.

17. A computing device as described in claim 15, wherein the intermediate controller is further configured to:

detect disconnection of the accessory device from the interface; and

set the general purpose input/output (GPIO) pin to a value indicative of the disconnection of the accessory device to notify the operating system of the disconnection of the accessory device and thereby cause the operating system to denumerate the accessory device within a device configuration and power management system implemented by the operating system.

18. A computing device as described in claim 17, wherein to denumerate the accessory device the operating system is configured to:

remove a representation of the accessory device from a device table associated with the device configuration and power management system in response to reading the general purpose input/output (GPIO) pin value indicative of disconnection.

19. A computing device as described in claim 15, wherein the communication bus communication that does not natively support device enumeration is configured as one of a serial peripheral interface (SPI) bus, universal asynchronous receiver/transmitter (UART) bus, or Inter-Integrated Circuit (I2C) bus.

20. A computing device as described in claim 15, wherein the intermediate controller is configured to support device enumeration for multiple different communication busses employed by the computing device that do not natively support device enumeration.