Composite Wafer Semiconductor
First Claim
1. A device comprising:
- a first substrate;
a patterned first conductor layer and a first isolation set formed on a first side of the first substrate;
a patterned second conductor layer and a second isolation set formed on the first isolation set;
a free space etched in the second isolation set over a portion of the first isolation set;
a second substrate bonded to the second isolation set;
a microelectromechanical system (MEMS) device formed in the second substrate over the free space;
a first via conductor formed through the second substrate and through a portion of the second isolation set to the second conductor layer;
a backside via formed from a second side of the first substrate to the first conductor layer;
a backside isolation layer formed on the second side of the first substrate; and
a backside via conductor formed in the backside via.
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Accused Products
Abstract
A composite wafer semiconductor device includes a first wafer and a second wafer. The first wafer has a first side and a second side, and the second side is substantially opposite the first side. The composite wafer semiconductor device also includes an isolation set is formed on the first side of the first wafer and a free space is etched in the isolation set. The second wafer is bonded to the isolation set. A floating structure, such as an inertia sensing device, is formed in the second wafer over the free space. In an embodiment, a surface mount pad is formed on the second side of the first wafer. Then, the floating structure is electrically coupled to the surface mount pad using a through silicon via (TSV) conductor.
5 Citations
20 Claims
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1. A device comprising:
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a first substrate; a patterned first conductor layer and a first isolation set formed on a first side of the first substrate; a patterned second conductor layer and a second isolation set formed on the first isolation set; a free space etched in the second isolation set over a portion of the first isolation set; a second substrate bonded to the second isolation set; a microelectromechanical system (MEMS) device formed in the second substrate over the free space; a first via conductor formed through the second substrate and through a portion of the second isolation set to the second conductor layer; a backside via formed from a second side of the first substrate to the first conductor layer; a backside isolation layer formed on the second side of the first substrate; and a backside via conductor formed in the backside via. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A device comprising:
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a first substrate having a first surface opposing a second surface; a first dielectric layer and a first conductive layer formed over the first surface of the first substrate; a second dielectric layer and a second conductive layer formed over the first dielectric layer and the first conductive layer of the first substrate; a space within the second dielectric layer a second substrate bonded to the second dielectric layer of the first substrate; a floating structure formed in the second substrate over the space; a first via extending through the second substrate and the second dielectric layer to the second conductive layer. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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15. A device comprising:
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a first substrate having a first side and an opposing second side; an isolation set on the first side of the first substrate; a free space disposed in the isolation set; a second substrate coupled to the first substrate; a floating structure disposed in the second substrate over the free space; a first via conductor extending through the first substrate to electrically couple the floating structure to a pad on the second side of the first substrate; and a second via conductor extending through the second substrate and through a portion of the isolation set to electrically couple the floating structure to the second via conductor. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification