INTEGRATED DRIVER AND RELATED METHOD
1 Assignment
0 Petitions
Accused Products
Abstract
A driver circuit may include a first node (VA), and a first circuit to generate on the first node (VA) an inverted replica of an input signal (VIN) during driver switching between a first supply voltage (Vdd1) and ground, the inverted replica having a threshold voltage value based upon a reference voltage (Vref) greater than the first supply voltage (Vdd1). The driver circuit may include a cascode stage (M3) to be controlled by the reference voltage (Vref) and to be coupled between a second supply voltage (Vdd2) and the first node, a delay circuit (D) to generate a delayed replica of the input signal (VIN), an amplifier, and a switching network (M5, M6) to couple a control terminal of an active load transistor (M9) either to one of the reference voltage (Vref) or to ground, based upon the input signal (VIN).
-
Citations
32 Claims
-
1-9. -9. (canceled)
-
10. A driver circuit comprising:
-
a first node; a first circuit configured to generate on said first node an inverted replica of an input signal during driver switching between a first supply voltage and a first reference voltage, the inverted replica having a threshold voltage value based upon a second reference voltage greater than the first supply voltage; a cascode stage configured to be controlled by the second reference voltage and to be coupled between a second supply voltage and said first node; a delay circuit configured to generate a delayed replica of the input signal; an amplifier comprising a first switch configured to be coupled to the first reference voltage and to be controlled by the delayed replica of the input signal, a second switch configured to be controlled by the first supply voltage and comprising a conduction terminal to define an output terminal, and an active load switch configured to be coupled between the output terminal and the second supply voltage and comprising a control terminal; and a switching network configured to couple said control terminal of said active load switch to at least one of the first reference voltage and said first node based upon the input signal. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
-
-
19. A differential driver circuit comprising:
a plurality of driver circuits configured to be input with respective complementary input signals and each driver circuit comprising a first node, a first circuit configured to generate on said first node an inverted replica of a respective complementary input signal during driver switching between a first supply voltage and a first reference voltage, the inverted replica having a threshold voltage value based upon a second reference voltage greater than the first supply voltage, a cascode stage configured to be controlled by the second reference voltage and to be coupled between a second supply voltage and said first node, a delay circuit configured to generate a delayed replica of the respective complementary input signal, an amplifier comprising a first switch configured to be coupled to the first reference voltage and to be controlled by the delayed replica of the respective complementary input signal, a second switch configured to be controlled by the first supply voltage and comprising a conduction terminal to define an output terminal, and an active load switch configured to be coupled between the output terminal and the second supply voltage and comprising a control terminal, and a switching network configured to couple said control terminal of said active load transistor to at least one of the first reference voltage and said first node based upon the respective complementary input signal. - View Dependent Claims (20, 21, 22, 23)
-
24. A Mach-Zehnder optical modulator comprising:
-
a modulator; and a driver configured to control the said modulator and comprising a first node, a first circuit configured to generate on said first node an inverted replica of an input signal during driver switching between a first supply voltage and a first reference voltage, the inverted replica having a threshold voltage value based upon a second reference voltage greater than the first supply voltage, a cascode stage configured to be controlled by the second reference voltage and to be coupled between a second supply voltage and said first node, a delay circuit configured to generate a delayed replica of the input signal, an amplifier comprising a first switch configured to be coupled to the first reference voltage and to be controlled by the delayed replica of the input signal, a second switch configured to be controlled by the first supply voltage and comprising a conduction terminal to define an output terminal, and an active load switch configured to be coupled between the output terminal and the second supply voltage and comprising a control terminal, and a switching network configured to couple said control terminal of said active load switch to at least one of the first reference voltage and said first node based upon the input signal. - View Dependent Claims (25, 26, 27, 28)
-
-
29. A method of generating an output signal switching between a second supply voltage and a first reference voltage, starting from an input signal switching between a first supply voltage and the first reference voltage using an amplifier, the amplifier having a first switch to be coupled to the first reference voltage and to be controlled by a delayed replica of the input signal, a second switch to be controlled by the first supply voltage and comprising a conduction terminal to define an output terminal, and an active load switch to be coupled between the output terminal and the second supply voltage and comprising a control terminal, the method comprising:
-
generating an inverted replica of the input signal having a threshold voltage based upon a second reference voltage greater than the first supply voltage; controlling the first switch with the delayed replica of the input signal; controlling the second switch with the first supply voltage; and coupling the control node of the active load switch to at least one of the first reference voltage and the inverted replica of the input signal based upon on a level of the input signal. - View Dependent Claims (30, 31, 32)
-
Specification