THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL AND A METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL
First Claim
1. A method for manufacturing a thin film transistor array substrate for a display panel comprises:
- forming a gate pattern on a substrate, wherein the gate pattern includes a gate electrode, a plurality of gate lines and a plurality of storage electrode lines;
forming a gate insulating film on the gate pattern including the gate electrode, the plurality of gate lines and the plurality of storage electrode lines;
forming a source/drain pattern and a semiconductor pattern on the substrate, wherein the source/drain patterns includes a plurality of data lines, a source electrode and a drain electrode;
forming a first passivation film, a second passivation film, and a third passivation film successively on the substrate;
forming the first photoresist pattern which includes a first portion formed on part of the drain electrode and on a pixel region and a second portion formed on the semiconductor pattern which includes a channel region between the source electrode and the drain electrode, and wherein the second portion of the photoresist pattern has a relatively higher height than the first portion;
patterning an exposed portion of the first passivation film, the second passivation film and the third passivation film using the first photoresist pattern;
forming the second photoresist pattern by removing the first portion of the first photoresist pattern using an etch-back process;
patterning an exposed portion of the third passivation layer around the pixel region using the second photoresist pattern, wherein the patterning of the third passivation film includes over-etching the third passivation film;
forming a transparent electrode film on the substrate;
removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern; and
forming a transparent electrode pattern on the second passivation layer.
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Abstract
A method of manufacturing a thin film transistor array substrate includes forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming first, second, and third passivation films successively on the substrate. Over the above multi-layered passivation film forming a first photoresist pattern including a first portion formed on part of the drain electrode and on the pixel region, and a second portion. The second portion is thicker than the first portion. Then, patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern, and forming a transparent electrode pattern on the second passivation layer.
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Citations
7 Claims
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1. A method for manufacturing a thin film transistor array substrate for a display panel comprises:
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forming a gate pattern on a substrate, wherein the gate pattern includes a gate electrode, a plurality of gate lines and a plurality of storage electrode lines; forming a gate insulating film on the gate pattern including the gate electrode, the plurality of gate lines and the plurality of storage electrode lines; forming a source/drain pattern and a semiconductor pattern on the substrate, wherein the source/drain patterns includes a plurality of data lines, a source electrode and a drain electrode; forming a first passivation film, a second passivation film, and a third passivation film successively on the substrate; forming the first photoresist pattern which includes a first portion formed on part of the drain electrode and on a pixel region and a second portion formed on the semiconductor pattern which includes a channel region between the source electrode and the drain electrode, and wherein the second portion of the photoresist pattern has a relatively higher height than the first portion; patterning an exposed portion of the first passivation film, the second passivation film and the third passivation film using the first photoresist pattern; forming the second photoresist pattern by removing the first portion of the first photoresist pattern using an etch-back process; patterning an exposed portion of the third passivation layer around the pixel region using the second photoresist pattern, wherein the patterning of the third passivation film includes over-etching the third passivation film; forming a transparent electrode film on the substrate; removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern; and forming a transparent electrode pattern on the second passivation layer. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification