METHODS AND APPARATUS FOR REALLOCATING ADDRESSABLE SPACES WITHIN MEMORY DEVICES

• US 20130311709A1
• Filed: 10/19/2012
• Published: 11/21/2013
• Est. Priority Date: 10/19/2006
• Status: Active Grant

• Current Assignee: Dong-Gi Lee, Hye-Young Kim, Jung-Been Im, Shea-Yun Lee, Young-Joon Choi
• Original Assignee: Shea-Yun Lee, Young-Joon Choi
• Inventors: Im, Jung-Been, Kim, Hye-Young, Choi, Young-Joon, Lee, Dong-Gi, Lee, Shea-Yun
• Granted Patent: US 8,886,912 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/7211 Wear leveling

Abstract

Integrated circuit systems include a non-volatile memory device (e.g, flash EEPROM device) and a memory processing circuit. The memory processing circuit is electrically coupled to the non-volatile memory device. The memory processing circuit is configured to reallocate addressable space within the non-volatile memory device. This reallocation is performed by increasing a number of physical addresses within the non-volatile memory device that are reserved as redundant memory addresses, in response to a capacity adjust command received by the memory processing circuit.

Claims

1-12. -12. (canceled)

13. A method of adjusting of a memory system including a memory processor and a nonvolatile memory device comprising an active memory region and a reserved memory region, the memory system being connected to a host, the method comprising:

detecting amount of free space of the reserved memory region during an operation of the memory system;

sending a result of the detecting to the host;

receiving a capacity adjusting command from the host;

reading a current mapping information from the nonvolatile memory device;

reconstructing a new mapping information by modifying the current information in response to the capacity adjusting command; and

saving the new mapping information into the nonvolatile memory device.

14. The method of claim 13, wherein the reconstructing the new mapping information is performed to increase a capacity of the reserved memory region in response to the capacity adjusting command.

15. The method of claim 13, wherein the reconstructing the new mapping information is performed to decrease a capacity of the reserved memory region in response to the capacity adjusting command.

16. The method of claim 13, wherein the nonvolatile memory device is a memory card.

17. The method of claim 13, wherein the method is performed using logic associated with a flash translation layer.

18. A computer readable storage medium having a computer readable program stored therein, wherein the computer readable program, when executed on a memory system including a memory processor and a nonvolatile memory device comprising an active memory region and a reserved memory region, causes the memory system to:

detect amount of free space of the reserved memory region during an operation of the system;

send a result of the detecting to a host connected to the memory system;

receive a capacity adjusting command from the host;

read a current mapping information from the nonvolatile memory device;

reconstruct a new mapping information by modifying the current information in response to the capacity adjusting command; and

save the new mapping information into the nonvolatile memory device.

19. A memory system, comprising:

a memory processor; and

a nonvolatile memory device including an active memory region and a reserved memory region,

wherein the memory processor is configured to detect amount of free space of the reserved memory region during an operation of the system, to send a result of the detecting to a host connected to the memory system, to receive a capacity adjusting command from the host, to read a current mapping information from the nonvolatile memory device, to reconstruct a new mapping information by modifying the current information in response to the capacity adjusting command, and to save the new mapping information into the nonvolatile memory device.

20. The memory system of claim 19, wherein the nonvolatile memory device is a memory card.

21. A method of adjusting of a memory system including a memory processor and a nonvolatile memory device comprising an active memory region and a reserved memory region, the method comprising:

receiving a parameter value along with a capacity adjusting instruction from a host to adjust an active memory capacity of the active memory region, the parameter value identifying a size of the active memory capacity;

reading a current mapping information from the nonvolatile memory device;

reconstructing a new mapping information by modifying the current mapping information based on the parameter value; and

saving the new mapping information into the nonvolatile memory device,

wherein the new mapping information establishes a new size of the active memory region.

22. The method of claim 21, wherein the reconstructing the new mapping information is performed to increase a capacity of the reserved memory region in response to the capacity adjusting command.

23. The method of claim 21, wherein the reconstructing the new mapping information is performed to decrease a capacity of the reserved memory region in response to the capacity adjusting command.

24. The method of claim 21, wherein the nonvolatile memory device is a flash EEPROM device.

25. The method of claim 21, wherein the method is performed using logic associated with a flash translation layer (FTL).

26. A computer readable storage medium having a computer readable program stored therein, wherein the computer readable program, when executed on a memory system including a memory processor and a nonvolatile memory device comprising an active memory region and a reserved memory region, causes the memory system to:

upon receiving a parameter value along with a capacity adjusting instruction from a host to adjust an active memory capacity of the active memory region, the parameter value identifying a size of the active memory capacity;

read a current mapping information from the nonvolatile memory device;

reconstruct a new mapping information by modifying the current mapping information based on the parameter value; and

save the new mapping information into the nonvolatile memory device,

wherein the new mapping information establishes a new size of the active memory region.

27. A memory system, comprising:

a memory processor; and

a nonvolatile memory device comprising an active memory region and a reserved memory region,

wherein the memory processor is configured to receive a parameter value along with a capacity adjusting instruction from a host to adjust an active memory capacity of the active memory region, the parameter value identifying a size of the active memory capacity, to read a current mapping information from the nonvolatile memory device, to reconstruct a new mapping information by modifying the current mapping information based on the parameter value, and to save the new mapping information into the nonvolatile memory device, and

wherein the new mapping information establishes a new size of the active memory region.

28. The memory system of claim 27, wherein the nonvolatile memory device is a flash EEPROM device.