Isolated Through Silicon Via and Isolated Deep Silicon Via Having Total or Partial Isolation
First Claim
1. A method for improving electrical signal isolation in a semiconductor substrate, said method comprising:
- fabricating a deep trench having sidewalls into said semiconductor substrate;
forming an isolation region along at least an upper portion of said sidewalls of said deep trench.
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Accused Products
Abstract
Disclosed are a structure for improving electrical signal isolation in a semiconductor substrate and an associated method for the structure'"'"'s fabrication. The structure includes a deep trench having sidewalls disposed in the semiconductor substrate. An isolation region may be formed along at least an upper portion of the sidewalls of the deep trench, and a metallic filler may be disposed in the deep trench. The isolation region may include a PN junction formed by one or more of ion implantation and annealing, deposition of highly doped polysilicon and out diffusion, and gas phase doping and annealing. In the alternative, the isolation region may be a dielectric isolation region formed by one or more of uniform dielectric deposition, partial dieletric deposition, and dielectric deposition by ionic reaction.
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Citations
20 Claims
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1. A method for improving electrical signal isolation in a semiconductor substrate, said method comprising:
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fabricating a deep trench having sidewalls into said semiconductor substrate; forming an isolation region along at least an upper portion of said sidewalls of said deep trench. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A structure for improving electrical signal isolation in a semiconductor substrate, said structure comprising:
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a deep trench having sidewalls disposed in said semiconductor substrate; an isolation region formed along at least an upper portion of said sidewalls of said deep trench. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification